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authorRichard Zhu <hongxing.zhu@nxp.com>2017-02-28 09:22:23 +0800
committerAnson Huang <Anson.Huang@nxp.com>2017-06-08 21:00:32 +0800
commit60bfa35a1fb8302386675315ec47dc2feb7c4e3c (patch)
tree36e0e38ad77ebef6ccbae90c128be316bd28c184 /arch/arm/boot
parentb994af31697fa44200d5ba0488d15b0499f803e4 (diff)
MLK-14325-1 ARM: dts: enable imx pcie gen2 link
Set the max link capability of the imx pcie to gen2 Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi1
-rw-r--r--arch/arm/boot/dts/imx6qp-sabresd.dts4
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi1
-rw-r--r--arch/arm/boot/dts/imx7d.dtsi1
4 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index ee5ac299e062..a78fea00555f 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -238,6 +238,7 @@
<&clks IMX6QDL_CLK_LVDS1_GATE>,
<&clks IMX6QDL_CLK_PCIE_REF_125M>;
clock-names = "pcie", "pcie_bus", "pcie_phy";
+ fsl,max-link-speed = <2>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts
index 49d400c674b9..59636a0bad9f 100644
--- a/arch/arm/boot/dts/imx6qp-sabresd.dts
+++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
@@ -88,10 +88,6 @@
};
};
-&pcie {
- status = "disabled";
-};
-
&iomuxc {
imx6qdl-sabresd {
pinctrl_usdhc2: usdhc2grp {
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 006a2825f65a..29f9caeb66f3 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -1539,6 +1539,7 @@
clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
pcie-phy-supply = <&reg_pcie_phy>;
power-domains = <&gpc 2>;
+ fsl,max-link-speed = <2>;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 360c941d2cc4..457927ab3ffd 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -214,6 +214,7 @@
<&clks IMX7D_PCIE_PHY_ROOT_CLK>;
clock-names = "pcie", "pcie_bus", "pcie_phy";
pcie-phy-supply = <&reg_1p0d>;
+ fsl,max-link-speed = <2>;
status = "disabled";
};
};