diff options
author | Gary King <gking@nvidia.com> | 2010-04-07 15:45:05 -0700 |
---|---|---|
committer | Gary King <gking@nvidia.com> | 2010-04-08 20:07:39 -0700 |
commit | d867486ebfa7d1dbcb3cf9e1f0eb70c75c369df6 (patch) | |
tree | 77904d661924fd4b9dcd5e2054253ef7ba63b378 /arch/arm/common | |
parent | e7f3cf8b374c86cd12872f443c43ed8248692300 (diff) |
[ARM] gic: add gic_cpu_exit function
add a function to be called during CPU teardown which disables
interrupts on the processor interface of the CPU which is being
disabled.
Change-Id: I78588bb3352e89d22bc44eb0778c1b46e87a7aed
Diffstat (limited to 'arch/arm/common')
-rw-r--r-- | arch/arm/common/gic.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 337741f734ac..8ef8c67e4d1f 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -254,6 +254,14 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) writel(1, base + GIC_CPU_CTRL); } +void gic_cpu_exit(unsigned int gic_nr) +{ + if (gic_nr >= MAX_GIC_NR) + BUG(); + + writel(0, gic_data[gic_nr].cpu_base + GIC_CPU_CTRL); +} + #ifdef CONFIG_SMP void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) { |