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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-10-08 10:06:58 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-10-08 10:06:58 +0100
commit4fa046655b80e9bb361a95da5c86ce778f5018b9 (patch)
tree53105e279484895b3cb24dd73eb47a19f1381137 /arch/arm/common
parent552dc340bce3b28f4af33c9134adafa5efacf1c9 (diff)
parent846afbd1fe015e082c89d56dd42c484d896ef58e (diff)
Merge branch 'for-russell' of git://codeaurora.org/quic/kernel/dwalker/linux-msm into devel-stable
Diffstat (limited to 'arch/arm/common')
-rw-r--r--arch/arm/common/gic.c14
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 7dfa9a85bc0c..ada6359160eb 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -67,25 +67,11 @@ static inline unsigned int gic_irq(unsigned int irq)
/*
* Routines to acknowledge, disable and enable interrupts
- *
- * Linux assumes that when we're done with an interrupt we need to
- * unmask it, in the same way we need to unmask an interrupt when
- * we first enable it.
- *
- * The GIC has a separate notion of "end of interrupt" to re-enable
- * an interrupt after handling, in order to support hardware
- * prioritisation.
- *
- * We can make the GIC behave in the way that Linux expects by making
- * our "acknowledge" routine disable the interrupt, then mark it as
- * complete.
*/
static void gic_ack_irq(unsigned int irq)
{
- u32 mask = 1 << (irq % 32);
spin_lock(&irq_controller_lock);
- writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4);
writel(gic_irq(irq), gic_cpu_base(irq) + GIC_CPU_EOI);
spin_unlock(&irq_controller_lock);
}