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authorWill Deacon <will.deacon@arm.com>2012-04-04 10:13:49 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2012-04-20 14:55:15 +0100
commita38d59c28b8fe0ecc00beb4b57b11490105fc1fb (patch)
treeeba0db78e9188f13ad15ff8c5b8218ad363a5712 /arch/arm/configs/ag5evm_defconfig
parentcb0ec30dee53229a03f0a41a6010df93450da16b (diff)
ARM: vic: re-read status register before dispatching each IRQ handler
handle_IRQ may briefly cause interrupts to be re-enabled during soft IRQ processing on the exit path, leading to nested handling of VIC interrupts. Since the current code does not re-read the VIC_IRQ_STATUS register, this can lead to multiple invocations of the same interrupt handler and spurious interrupts to be reported. This patch changes the VIC interrupt dispatching code to re-read the status register each time, avoiding duplicate invocations of the same handler. Acked-and-tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/configs/ag5evm_defconfig')
0 files changed, 0 insertions, 0 deletions