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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-21 16:01:50 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-21 16:01:50 -0700
commitff8ce5f67ddca709fe59e6173f89260f0fdc2b22 (patch)
tree90d3ad380b290d251b54590be485b2ffb4528e5a /arch/arm/include/asm/mach/pci.h
parent4f6ade91532b5b05ea28219b891f12a3cec528cd (diff)
parent4ab1056766a4e49f6b9ef324313dd1583f8f8f4e (diff)
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull core ARM updates from Russell King: "This is the bulk of the core ARM updates for this merge window. Included in here is a different way to handle the VIVT cache flushing on context switch, which should allow scheduler folk to remove a special case in their core code. We have architectured timer support here, which is a set of timers specified by the ARM architecture for future SoCs. So we should see less variability in timer design going forward. The last big thing here is my cleanup to the way we handle PCI across ARM, fixing some oddities in some platforms which hadn't realised there was a way to deal with their private data already built in to our PCI backend. I've also removed support for the ARMv3 architecture; it hasn't worked properly for years so it seems pointless to keep it around." * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (47 commits) ARM: PCI: remove per-pci_hw list of buses ARM: PCI: dove/kirkwood/mv78xx0: use sys->private_data ARM: PCI: provide a default bus scan implementation ARM: PCI: get rid of pci_std_swizzle() ARM: PCI: versatile: fix PCI interrupt setup ARM: PCI: integrator: use common PCI swizzle ARM: 7416/1: LPAE: Remove unused L_PTE_(BUFFERABLE|CACHEABLE) macros ARM: 7415/1: vfp: convert printk's to pr_*'s ARM: decompressor: avoid speculative prefetch from non-RAM areas ARM: Remove ARMv3 support from decompressor ARM: 7413/1: move read_{boot,persistent}_clock to the architecture level ARM: Remove support for ARMv3 ARM610 and ARM710 CPUs ARM: 7363/1: DEBUG_LL: limit early mapping to the minimum ARM: 7391/1: versatile: add some auxdata for device trees ARM: 7389/2: plat-versatile: modernize FPGA IRQ controller AMBA: get rid of last two uses of NO_IRQ ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held ARM: 7404/1: cmpxchg64: use atomic64 and local64 routines for cmpxchg64 ARM: 7347/1: SCU: use cpu_logical_map for per-CPU low power mode ...
Diffstat (limited to 'arch/arm/include/asm/mach/pci.h')
-rw-r--r--arch/arm/include/asm/mach/pci.h17
1 files changed, 6 insertions, 11 deletions
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index d943b7d20f11..26c511fddf8f 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -12,13 +12,14 @@
#define __ASM_MACH_PCI_H
struct pci_sys_data;
+struct pci_ops;
struct pci_bus;
struct hw_pci {
#ifdef CONFIG_PCI_DOMAINS
int domain;
#endif
- struct list_head buses;
+ struct pci_ops *ops;
int nr_controllers;
int (*setup)(int nr, struct pci_sys_data *);
struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
@@ -45,16 +46,10 @@ struct pci_sys_data {
u8 (*swizzle)(struct pci_dev *, u8 *);
/* IRQ mapping */
int (*map_irq)(const struct pci_dev *, u8, u8);
- struct hw_pci *hw;
void *private_data; /* platform controller private data */
};
/*
- * This is the standard PCI-PCI bridge swizzling algorithm.
- */
-#define pci_std_swizzle pci_common_swizzle
-
-/*
* Call this with your hw_pci struct to initialise the PCI system.
*/
void pci_common_init(struct hw_pci *);
@@ -62,22 +57,22 @@ void pci_common_init(struct hw_pci *);
/*
* PCI controllers
*/
+extern struct pci_ops iop3xx_ops;
extern int iop3xx_pci_setup(int nr, struct pci_sys_data *);
-extern struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *);
extern void iop3xx_pci_preinit(void);
extern void iop3xx_pci_preinit_cond(void);
+extern struct pci_ops dc21285_ops;
extern int dc21285_setup(int nr, struct pci_sys_data *);
-extern struct pci_bus *dc21285_scan_bus(int nr, struct pci_sys_data *);
extern void dc21285_preinit(void);
extern void dc21285_postinit(void);
+extern struct pci_ops via82c505_ops;
extern int via82c505_setup(int nr, struct pci_sys_data *);
-extern struct pci_bus *via82c505_scan_bus(int nr, struct pci_sys_data *);
extern void via82c505_init(void *sysdata);
+extern struct pci_ops pci_v3_ops;
extern int pci_v3_setup(int nr, struct pci_sys_data *);
-extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *);
extern void pci_v3_preinit(void);
extern void pci_v3_postinit(void);