diff options
author | Justin Waters <justin.waters@timesys.com> | 2012-08-02 12:11:13 -0400 |
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committer | Justin Waters <justin.waters@timesys.com> | 2012-08-02 12:11:13 -0400 |
commit | 101eca5af60e95bae2ba642ef93681bb184107bc (patch) | |
tree | 5bf8ba4075671d5e3d45dcc40d971ad057e77c48 /arch/arm/include/asm/mvf_edma_regs.h | |
parent | a7e93790bb050e8d4bc1982550e8fc44a0747b49 (diff) | |
parent | 2bcc4aedaf8fb4e022ae9f80bf36926367b8c5f6 (diff) |
Merge remote-tracking branch 'github/3.0-vybrid-lineo' into 3.0-vybrid
Conflicts:
arch/arm/mach-mvf/board-twr_vf600.c
Diffstat (limited to 'arch/arm/include/asm/mvf_edma_regs.h')
-rw-r--r-- | arch/arm/include/asm/mvf_edma_regs.h | 65 |
1 files changed, 31 insertions, 34 deletions
diff --git a/arch/arm/include/asm/mvf_edma_regs.h b/arch/arm/include/asm/mvf_edma_regs.h index d5d2f253df07..b87d47ee9bd7 100644 --- a/arch/arm/include/asm/mvf_edma_regs.h +++ b/arch/arm/include/asm/mvf_edma_regs.h @@ -86,46 +86,43 @@ /* Register read/write macros */ /* offset 0x0000_0000 - 0x0000_00ff main dma control area */ -#define MVF_EDMA_CR(base) MVF_REG32((long)(base) + 0x00000000) -#define MVF_EDMA_ES(base) MVF_REG32((long)(base) + 0x00000004) -//#define MVF_EDMA_ERQH(base) MVF_REG32((long)(base) + 0x00000008) -#define MVF_EDMA_ERQ(base) MVF_REG32((long)(base) + 0x0000000C) -//#define MVF_EDMA_EEIH(base) MVF_REG32((long)(base) + 0x00000010) -#define MVF_EDMA_EEI(base) MVF_REG32((long)(base) + 0x00000014) -#define MVF_EDMA_SERQ(base) MVF_REG08((long)(base) + 0x00000008) -#define MVF_EDMA_CERQ(base) MVF_REG08((long)(base) + 0x00000019) -#define MVF_EDMA_SEEI(base) MVF_REG08((long)(base) + 0x0000001A) -#define MVF_EDMA_CEEI(base) MVF_REG08((long)(base) + 0x0000001B) -#define MVF_EDMA_CINT(base) MVF_REG08((long)(base) + 0x0000001C) -#define MVF_EDMA_CERR(base) MVF_REG08((long)(base) + 0x0000001D) -#define MVF_EDMA_SSRT(base) MVF_REG08((long)(base) + 0x0000001E) -#define MVF_EDMA_CDNE(base) MVF_REG08((long)(base) + 0x0000001F) -//#define MVF_EDMA_INTH(base) MVF_REG32((long)(base) + 0x00000020) -#define MVF_EDMA_INT(base) MVF_REG32((long)(base) + 0x00000024) -//#define MVF_EDMA_ERRH(base) MVF_REG32((long)(base) + 0x00000028) -#define MVF_EDMA_ERR(base) MVF_REG32((long)(base) + 0x0000002C) -//#define MVF_EDMA_RSH(base) MVF_REG32((long)(base) + 0x00000030) -#define MVF_EDMA_RS(base) MVF_REG32((long)(base) + 0x00000034) +#define MVF_EDMA_CR(base) MVF_REG32((long)((long)(base) + 0x00000000)) +#define MVF_EDMA_ES(base) MVF_REG32((long)((long)(base) + 0x00000004)) +#define MVF_EDMA_ERQ(base) MVF_REG32((long)((long)(base) + 0x0000000C)) +#define MVF_EDMA_EEI(base) MVF_REG32((long)((long)(base) + 0x00000014)) + +#define MVF_EDMA_CEEI(base) MVF_REG08((long)((long)(base) + 0x00000018)) +#define MVF_EDMA_SEEI(base) MVF_REG08((long)((long)(base) + 0x00000019)) +#define MVF_EDMA_CERQ(base) MVF_REG08((long)((long)(base) + 0x0000001a)) +#define MVF_EDMA_SERQ(base) MVF_REG08((long)((long)(base) + 0x0000001b)) +#define MVF_EDMA_CDNE(base) MVF_REG08((long)((long)(base) + 0x0000001c)) +#define MVF_EDMA_SSRT(base) MVF_REG08((long)((long)(base) + 0x0000001d)) +#define MVF_EDMA_CERR(base) MVF_REG08((long)((long)(base) + 0x0000001e)) +#define MVF_EDMA_CINT(base) MVF_REG08((long)((long)(base) + 0x0000001f)) + +#define MVF_EDMA_INT(base) MVF_REG32((long)((long)(base) + 0x00000024)) +#define MVF_EDMA_ERR(base) MVF_REG32((long)((long)(base) + 0x0000002C)) +#define MVF_EDMA_RS(base) MVF_REG32((long)((long)(base) + 0x00000034)) /* Parameterized register read/write macros for multiple registers */ /* offset 0x0000_0100 - 0x0000_011f dma channel priority area */ -#define MVF_EDMA_DCHPRI(base,x) MVF_REG08((long)(base) + 0x00000100 +((x)*0x001)) +#define MVF_EDMA_DCHPRI(base,x) MVF_REG08((long)((long)(base) + 0x00000100 +((x)*0x001))) /* offset 0x0000_1000 - 0x0000_13ff tcd area */ -#define MVF_EDMA_TCD_SADDR(base,x) MVF_REG32((long)(base) + 0x00001000 +((x)*0x020)) -#define MVF_EDMA_TCD_ATTR(base,x) MVF_REG16((long)(base) + 0x00001004 +((x)*0x020)) -#define MVF_EDMA_TCD_SOFF(base,x) MVF_REG16((long)(base) + 0x00001006 +((x)*0x020)) -#define MVF_EDMA_TCD_NBYTES(base,x) MVF_REG32((long)(base) + 0x00001008 +((x)*0x020)) -#define MVF_EDMA_TCD_SLAST(base,x) MVF_REG32((long)(base) + 0x0000100C +((x)*0x020)) -#define MVF_EDMA_TCD_DADDR(base,x) MVF_REG32((long)(base) + 0x00001010 +((x)*0x020)) -#define MVF_EDMA_TCD_CITER_ELINK(base,x) MVF_REG16((long)(base) + 0x00001014 +((x)*0x020)) -#define MVF_EDMA_TCD_CITER(base, x) MVF_REG16((long)(base) + 0x00001014 +((x)*0x020)) -#define MVF_EDMA_TCD_DOFF(base,x) MVF_REG16((long)(base) + 0x00001016 +((x)*0x020)) -#define MVF_EDMA_TCD_DLAST_SGA(base, x) MVF_REG32((long)(base) + 0x00001018 +((x)*0x020)) -#define MVF_EDMA_TCD_BITER_ELINK(base,x) MVF_REG16((long)(base) + 0x0000101C +((x)*0x020)) -#define MVF_EDMA_TCD_BITER(base, x) MVF_REG16((long)(base) + 0x0000101C +((x)*0x020)) -#define MVF_EDMA_TCD_CSR(base,x) MVF_REG16((long)(base) + 0x0000101e +((x)*0x020)) +#define MVF_EDMA_TCD_SADDR(base,x) MVF_REG32((long)((long)(base) + 0x00001000 +((x)*0x020))) +#define MVF_EDMA_TCD_SOFF(base,x) MVF_REG16((long)((long)(base) + 0x00001004 +((x)*0x020))) +#define MVF_EDMA_TCD_ATTR(base,x) MVF_REG16((long)((long)(base) + 0x00001006 +((x)*0x020))) +#define MVF_EDMA_TCD_NBYTES(base,x) MVF_REG32((long)((long)(base) + 0x00001008 +((x)*0x020))) +#define MVF_EDMA_TCD_SLAST(base,x) MVF_REG32((long)((long)(base) + 0x0000100C +((x)*0x020))) +#define MVF_EDMA_TCD_DADDR(base,x) MVF_REG32((long)((long)(base) + 0x00001010 +((x)*0x020))) +#define MVF_EDMA_TCD_DOFF(base,x) MVF_REG16((long)((long)(base) + 0x00001014 +((x)*0x020))) +#define MVF_EDMA_TCD_CITER_ELINK(base,x) MVF_REG16((long)((long)(base) + 0x00001016 +((x)*0x020))) +#define MVF_EDMA_TCD_CITER(base, x) MVF_REG16((long)((long)(base) + 0x00001016 +((x)*0x020))) +#define MVF_EDMA_TCD_DLAST_SGA(base, x) MVF_REG32((long)((long)(base) + 0x00001018 +((x)*0x020))) +#define MVF_EDMA_TCD_CSR(base,x) MVF_REG16((long)((long)(base) + 0x0000101c +((x)*0x020))) +#define MVF_EDMA_TCD_BITER_ELINK(base,x) MVF_REG16((long)((long)(base) + 0x0000101e +((x)*0x020))) +#define MVF_EDMA_TCD_BITER(base, x) MVF_REG16((long)((long)(base) + 0x0000101e +((x)*0x020))) /* Bit definitions and macros for CR */ #define MVF_EDMA_CR_EDBG (0x00000002) |