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authorKirill Artamonov <kartamonov@nvidia.com>2012-08-21 15:02:22 +0300
committerVarun Wadekar <vwadekar@nvidia.com>2012-08-30 15:50:01 +0530
commit0c1c2d99ddc4293f452a206f2588bdda7c5d2f1e (patch)
treefa1cf7b6f02fc5e35e20d27dd401dbf50647c919 /arch/arm/include
parent6578c3f6cc8692d03738d32ba7c83cae6d2481f4 (diff)
ARM: cache-l2x0: fix L2 maintenance for R3P1_50
Do flush and clear by set/way instead of by-way by enabling errata 727915 for pl310 revision R3P1_50. By-way maintenance doesn't work with enabled lp2_in_idle on Tegra3 platform using R3P1_50 revision of pl310. Debug register access causes hang when CONFIG_TRUSTED_FOUNDATIONS is defined. Don't access those regeisters if CONFIG_TRUSTED_FOUNDATIONS is defined. bug 983964 Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com> Change-Id: I76a3a9ef9dbcf86140ee26752202bf25542144e6 Reviewed-on: http://git-master/r/125153 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Antti Miettinen <amiettinen@nvidia.com> Tested-by: Antti Miettinen <amiettinen@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/hardware/cache-l2x0.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index fba3ec6910f7..7d4521a9cc5e 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -104,6 +104,7 @@
#define L2X0_ADDR_FILTER_EN 1
#define REV_PL310_R2P0 4
+#define REV_PL310_R3P1_50 7
#ifndef __ASSEMBLY__
extern void l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask);