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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2015-03-19 19:03:25 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-03-28 15:46:15 +0000
commitb8c9592b4a6c93211c8163888a97880d608503b5 (patch)
tree7f8a3bda959aedbd356591fbaa4df6946a26cfd5 /arch/arm/include
parenteb765c1ceb275b839ec67ff5779148b9298369c2 (diff)
ARM: 8318/1: treat CPU feature register fields as signed quantities
The various CPU feature registers consist of 4-bit blocks that represent signed quantities, whose positive values represent incremental features, and whose negative values are reserved. To improve forward compatibility, update the feature detection code to take possible future higher values into account, but ignore negative values. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/cputype.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 819777d0e91f..85e374f873ac 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -253,4 +253,20 @@ static inline int cpu_is_pj4(void)
#else
#define cpu_is_pj4() 0
#endif
+
+static inline int __attribute_const__ cpuid_feature_extract_field(u32 features,
+ int field)
+{
+ int feature = (features >> field) & 15;
+
+ /* feature registers are signed values */
+ if (feature > 8)
+ feature -= 16;
+
+ return feature;
+}
+
+#define cpuid_feature_extract(reg, field) \
+ cpuid_feature_extract_field(read_cpuid_ext(reg), field)
+
#endif