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authorGary King <gking@nvidia.com>2010-04-07 15:45:05 -0700
committerGary King <gking@nvidia.com>2010-04-08 20:07:39 -0700
commitd867486ebfa7d1dbcb3cf9e1f0eb70c75c369df6 (patch)
tree77904d661924fd4b9dcd5e2054253ef7ba63b378 /arch/arm/include
parente7f3cf8b374c86cd12872f443c43ed8248692300 (diff)
[ARM] gic: add gic_cpu_exit function
add a function to be called during CPU teardown which disables interrupts on the processor interface of the CPU which is being disabled. Change-Id: I78588bb3352e89d22bc44eb0778c1b46e87a7aed
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/hardware/gic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 7f34333bb545..5d19c4a5beac 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -35,6 +35,7 @@
#ifndef __ASSEMBLY__
void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);
void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
+void gic_cpu_exit(unsigned int gic_nr);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
#endif