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authorWill Deacon <will.deacon@arm.com>2011-06-03 17:40:15 +0100
committerJustin Waters <justin.waters@timesys.com>2012-09-12 16:49:37 -0400
commit68e1f67d443eb6ecf5cd6b898ebfb2b9e5baf172 (patch)
treea954d5d1925c831fd2813c6855896f81259f7121 /arch/arm/include
parente1be4924ca2868b773fb0a5b15b28c56d6f4a0e3 (diff)
ARM: perf: add support for the Cortex-A5 PMU
This patch adds support for the Cortex-A5 PMU to the ARMv7 perf-event backend. Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from commit 0c205cbe20654616e2f8389c0c1ff707d9dccb63)
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/perf_event.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index c4aa4e8c6af9..207bd3c79ab6 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -24,6 +24,7 @@ enum arm_perf_pmu_ids {
ARM_PERF_PMU_ID_V6MP,
ARM_PERF_PMU_ID_CA8,
ARM_PERF_PMU_ID_CA9,
+ ARM_PERF_PMU_ID_CA5,
ARM_NUM_PMU_IDS,
};