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authorAlexander Shishkin <virtuoso@slind.org>2010-08-04 11:25:20 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-08-10 22:10:53 +0100
commit9e354ea8e0710baf05804168fdabe90231b3d363 (patch)
tree3f86f2e6c8b7fd08256d9a2496583d0a21c51a05 /arch/arm/include
parent686ff22812d908eaa537edd62fb1eb3d64336301 (diff)
ARM: 6292/1: coresight: add ETM management registers
Add notion of ETM OS lock, save and restore registers. Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Alexander Shishkin <virtuoso@slind.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/hardware/coresight.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h
index f82b25d4f73e..212e47828c79 100644
--- a/arch/arm/include/asm/hardware/coresight.h
+++ b/arch/arm/include/asm/hardware/coresight.h
@@ -48,8 +48,6 @@ struct tracectx {
/* CoreSight Component Registers */
#define CSCR_CLASS 0xff4
-#define CSCR_PRSR 0x314
-
#define UNLOCK_MAGIC 0xc5acce55
/* ETM control register, "ETM Architecture", 3.3.1 */
@@ -132,6 +130,12 @@ struct tracectx {
ETMCTRL_BRANCH_OUTPUT | \
ETMCTRL_DO_CONTEXTID)
+/* ETM management registers, "ETM Architecture", 3.5.24 */
+#define ETMMR_OSLAR 0x300
+#define ETMMR_OSLSR 0x304
+#define ETMMR_OSSRR 0x308
+#define ETMMR_PDSR 0x314
+
/* ETB registers, "CoreSight Components TRM", 9.3 */
#define ETBR_DEPTH 0x04
#define ETBR_STATUS 0x0c