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authorRussell King <rmk+kernel@arm.linux.org.uk>2015-04-04 20:09:46 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-06-01 23:48:19 +0100
commitb2c3e38a54714e917c9e8675ff5812dca1c0f39d (patch)
tree0d5e9747b2c73ccd4c961c8d6a50841b52cf11fd /arch/arm/kernel/head-nommu.S
parent1221ed10f2a56ecdd8ff75f436f52aca5ba0f1d3 (diff)
ARM: redo TTBR setup code for LPAE
Re-engineer the LPAE TTBR setup code. Rather than passing some shifted address in order to fit in a CPU register, pass either a full physical address (in the case of r4, r5 for TTBR0) or a PFN (for TTBR1). This removes the ARCH_PGD_SHIFT hack, and the last dangerous user of cpu_set_ttbr() in the secondary CPU startup code path (which was there to re-set TTBR1 to the appropriate high physical address space on Keystone2.) Tested-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/head-nommu.S')
-rw-r--r--arch/arm/kernel/head-nommu.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index aebfbf79a1a3..84da14b7cd04 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -123,7 +123,7 @@ ENTRY(secondary_startup)
ENDPROC(secondary_startup)
ENTRY(__secondary_switched)
- ldr sp, [r7, #8] @ set up the stack pointer
+ ldr sp, [r7, #12] @ set up the stack pointer
mov fp, #0
b secondary_start_kernel
ENDPROC(__secondary_switched)