diff options
| author | Bo Yan <byan@nvidia.com> | 2012-11-27 14:40:33 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:43:52 -0700 |
| commit | 3b7ada1b78bf23fa0d734fdeac990d273649c050 (patch) | |
| tree | 141f107a7de3c2942b02ab22db43f6464574761e /arch/arm/kernel | |
| parent | ae252b528ddbc6b61460bff64744bb92c6c40de1 (diff) | |
ARM: tegra11x: Remove redundant cache flush
For CPU hotplug, since L1 cache is flushed when calling tegra_cpu_die,
there is no reason to do the same before that point.
Change-Id: I59adca195f8c0016819caa16a38602d886d1a10f
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/166701
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Diffstat (limited to 'arch/arm/kernel')
| -rw-r--r-- | arch/arm/kernel/smp.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 07897acc9220..0a93ea0c4482 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -184,6 +184,7 @@ int __cpuinit __cpu_disable(void) */ percpu_timer_stop(); +#ifndef CONFIG_ARCH_TEGRA_11x_SOC /* * Flush user cache and TLB mappings, and then remove this CPU * from the vm mask set of all processes. @@ -191,8 +192,16 @@ int __cpuinit __cpu_disable(void) * Caches are flushed to the Level of Unification Inner Shareable * to write-back dirty lines to unified caches shared by all CPUs. */ + + /* + * This step can be skipped over if we do the same thing later, + * which happens to be the case for tegra. We need to be careful + * here to make sure tegra_cpu_die always follows __cpu_disable + * in cpu shutdown sequence. + */ flush_cache_louis(); local_flush_tlb_all(); +#endif clear_tasks_mm_cpumask(cpu); |