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authorWill Deacon <will.deacon@arm.com>2012-09-21 17:53:08 +0100
committerWill Deacon <will.deacon@arm.com>2012-11-09 11:47:06 +0000
commit7f4050a07be8ce5fad069722326ccd550577a93a (patch)
tree25d70385131d664bc99697f6e95d50147a27b4b0 /arch/arm/kernel
parent614bea500a88be2a841af0967469961470f2be83 (diff)
ARM: hw_breakpoint: don't try to clear v6 debug registers during boot
v6 cores do not provide a way to clear the debug registers without first enabling monitor mode, meaning that we could take spurious debug exceptions. Instead, rely on the registers being in a sane state when we boot as they are defined to be disabled out of reset anyway. Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r--arch/arm/kernel/hw_breakpoint.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index ae6bf80e3a5e..8cd52faeb77e 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -912,8 +912,8 @@ static void reset_ctrl_regs(void *unused)
switch (debug_arch) {
case ARM_DEBUG_ARCH_V6:
case ARM_DEBUG_ARCH_V6_1:
- /* ARMv6 cores just need to reset the registers. */
- goto reset_regs;
+ /* ARMv6 cores clear the registers out of reset. */
+ goto out_mdbgen;
case ARM_DEBUG_ARCH_V7_ECP14:
/*
* Ensure sticky power-down is clear (i.e. debug logic is
@@ -966,7 +966,6 @@ clear_vcr:
return;
}
-reset_regs:
/*
* The control/value register pairs are UNKNOWN out of reset so
* clear them to avoid spurious debug events.
@@ -991,6 +990,7 @@ reset_regs:
* Have a crack at enabling monitor mode. We don't actually need
* it yet, but reporting an error early is useful if it fails.
*/
+out_mdbgen:
if (enable_monitor_mode())
cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
}