diff options
| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2009-09-21 09:30:09 +0200 |
|---|---|---|
| committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-01-22 17:04:39 +0100 |
| commit | 501d70383aa9ffc78b41aa7e74f6b0254c7c731c (patch) | |
| tree | b0a9421468f16aabff7ff8e92cf1655d17ef7eef /arch/arm/mach-at91/at91sam926x_time.c | |
| parent | 066000dd856709b6980123eb39b957fe26993f7b (diff) | |
arm/at91: Don't disable irqs in set_next_event and set_mode callbacks
on AT91 the timer irq is shared, so the handler might be entered without
irqs being disabled. Though this should not happen as the timer irq is
registered early, there have been some reports on the mailing list.
To make debugging that problem easier next time it pops up a
WARN_ON_ONCE is added to the handler if irqs are not off.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-at91/at91sam926x_time.c')
| -rw-r--r-- | arch/arm/mach-at91/at91sam926x_time.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index 4bd56aee4370..608a63240b64 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c @@ -62,16 +62,12 @@ static struct clocksource pit_clk = { static void pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) { - unsigned long flags; - switch (mode) { case CLOCK_EVT_MODE_PERIODIC: - /* update clocksource counter, then enable the IRQ */ - raw_local_irq_save(flags); + /* update clocksource counter */ pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN | AT91_PIT_PITIEN); - raw_local_irq_restore(flags); break; case CLOCK_EVT_MODE_ONESHOT: BUG(); @@ -100,6 +96,11 @@ static struct clock_event_device pit_clkevt = { */ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) { + /* + * irqs should be disabled here, but as the irq is shared they are only + * guaranteed to be off if the timer irq is registered first. + */ + WARN_ON_ONCE(!irqs_disabled()); /* The PIT interrupt may be disabled, and is shared */ if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) |