diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2012-01-12 13:11:43 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2012-01-12 13:11:43 +0900 |
| commit | b1bdd255661369cb6eb90b6e181169b5e6d0f9b6 (patch) | |
| tree | 17d15f3a6dc5bdd6205070dbef0e339421b13d25 /arch/arm/mach-at91/include/mach/at91rm9200.h | |
| parent | 9d14070f656addddce3d63fd483de46930b51850 (diff) | |
| parent | c1537b4863da620f12f5b42ece61bf65314148ed (diff) | |
Merge branch 'sh/nommu' into sh-latest
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91rm9200.h')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91rm9200.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h index e4037b500302..bacb51141819 100644 --- a/arch/arm/mach-at91/include/mach/at91rm9200.h +++ b/arch/arm/mach-at91/include/mach/at91rm9200.h @@ -79,17 +79,17 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */ -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */ -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */ -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */ -#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */ #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ -#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ +#define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */ +#define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */ +#define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */ +#define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */ +#define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */ +#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */ + #define AT91_USART0 AT91RM9200_BASE_US0 #define AT91_USART1 AT91RM9200_BASE_US1 #define AT91_USART2 AT91RM9200_BASE_US2 |