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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-02-13 14:58:30 +0800
committerNicolas Ferre <nicolas.ferre@atmel.com>2012-04-17 14:46:43 +0200
commitefd09165aa554f84a42565d5ae6a1af58b06a97a (patch)
tree3ca981db0ec5b7882f8e07f2ef204e97ea1b63f9 /arch/arm/mach-at91/pm.c
parent7eb1dbb3beb982a7d72514abff96ebc08a22e5cd (diff)
ARM: at91: pm select memory controler at runtime
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: add cpuidle modification] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/pm.c')
-rw-r--r--arch/arm/mach-at91/pm.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index f630250c6b87..1bfaad628731 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -261,7 +261,12 @@ static int at91_pm_enter(suspend_state_t state)
* For ARM 926 based chips, this requirement is weaker
* as at91sam9 can access a RAM in self-refresh mode.
*/
- at91_standby();
+ if (cpu_is_at91rm9200())
+ at91rm9200_standby();
+ else if (cpu_is_at91sam9g45())
+ at91sam9g45_standby();
+ else
+ at91sam9_standby();
break;
case PM_SUSPEND_ON:
@@ -307,10 +312,9 @@ static int __init at91_pm_init(void)
pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
-#ifdef CONFIG_ARCH_AT91RM9200
/* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
- at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
-#endif
+ if (cpu_is_at91rm9200())
+ at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
suspend_set_ops(&at91_pm_ops);