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authorMark A. Greer <mgreer@mvista.com>2009-04-15 12:39:48 -0700
committerKevin Hilman <khilman@deeprootsystems.com>2009-05-26 08:17:16 -0700
commit0e585952ac6a06b3c77d6b8eadb9c359766a700d (patch)
treed8216964e80d9cd3d86b5aa9cb25f035efa26bef /arch/arm/mach-davinci/dm355.c
parentd81d188cafecbc9e01df51527ac4c84a5b19e033 (diff)
davinci: Move pinmux setup info to SoC infrastructure
The pinmux register base and setup can be different for different SoCs so move the pinmux reg base, pinmux table (and its size) to the SoC infrastructure. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/dm355.c')
-rw-r--r--arch/arm/mach-davinci/dm355.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 37f20a7214be..f735ed9d2d10 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -436,6 +436,7 @@ void __init dm355_init_spi0(unsigned chipselect_mask,
* reg offset mask mode
*/
static const struct mux_config dm355_pins[] = {
+#ifdef CONFIG_DAVINCI_MUX
MUX_CFG(DM355, MMCSD0, 4, 2, 1, 0, false)
MUX_CFG(DM355, SD1_CLK, 3, 6, 1, 1, false)
@@ -466,6 +467,7 @@ INT_CFG(DM355, INT_EDMA_TC1_ERR, 4, 1, 1, false)
EVT_CFG(DM355, EVT8_ASP1_TX, 0, 1, 0, false)
EVT_CFG(DM355, EVT9_ASP1_RX, 1, 1, 0, false)
EVT_CFG(DM355, EVT26_MMC0_RX, 2, 1, 0, false)
+#endif
};
/*----------------------------------------------------------------------*/
@@ -558,12 +560,14 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
.cpu_clks = dm355_clks,
.psc_bases = dm355_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm355_psc_bases),
+ .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
+ .pinmux_pins = dm355_pins,
+ .pinmux_pins_num = ARRAY_SIZE(dm355_pins),
};
void __init dm355_init(void)
{
davinci_common_init(&davinci_soc_info_dm355);
- davinci_mux_register(dm355_pins, ARRAY_SIZE(dm355_pins));;
}
static int __init dm355_init_devices(void)