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author | Alex Frid <afrid@nvidia.com> | 2010-01-11 11:20:47 -0800 |
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committer | Alex Frid <afrid@nvidia.com> | 2010-01-11 16:56:34 -0800 |
commit | e9ef83b5d6f7a8c367a3ff2a88f373c3bb9312c1 (patch) | |
tree | 7ddf09e12c7ef96599633c27cd6ac25fe55125cc /arch/arm/mach-ep93xx/edb9307.c | |
parent | 9295e7abc68aea6b3ecd8191fa01e4661f281481 (diff) |
tegra RM: Init/restore DDR PD state machine.
Made sure DDR PD state machine is enabled during EMC DFS initialization
/restoration from LP0 before the 1st EMC clock change is triggered.
Change-Id: I26e16e30065cc356d70eb06ca51f4adeda728612
Diffstat (limited to 'arch/arm/mach-ep93xx/edb9307.c')
0 files changed, 0 insertions, 0 deletions