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authorLinus Torvalds <torvalds@linux-foundation.org>2015-02-17 09:17:33 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2015-02-17 09:17:33 -0800
commitea7531ac4a9d0b39edce43472147dc41cc2b7a34 (patch)
treec49d395de24f670bcf6cb5746af9e503b255e96b /arch/arm/mach-exynos/exynos.c
parent4025fa97ff39db054b47b9cdb9f3980480637668 (diff)
parent41e229a91207afc326f9a83ba33c098c8362d303 (diff)
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson: "This is a good healthy set of various code removals. Total net delta is 8100 lines removed. Among the larger cleanups are: - Removal of old Samsung S3C DMA infrastructure by Arnd - Removal of the non-DT version of the 'lager' board by Magnus Damm - General stale code removal on OMAP and Davinci by Rickard Strandqvist - Removal of non-DT support on am3517 platforms by Tony Lindgren ... plus several other cleanups of various platforms across the board" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (47 commits) ARM: sirf: drop redundant function and marco declaration arm: omap: specify PMUs are for ARMv7 CPUs arm: shmobile: specify PMUs are for ARMv7 CPUs arm: iop: specify PMUs are for XScale CPUs arm: pxa: specify PMUs are for XScale CPUs arm: realview: specify PMU types ARM: SAMSUNG: remove unused DMA infrastructure ARM: OMAP3: Add back Kconfig option MACH_OMAP3517EVM for ASoC ARM: davinci: Remove CDCE949 driver ARM: at91: remove useless at91rm9200_set_type() ARM: at91: remove useless at91rm9200_dt_initialize() ARM: at91: move debug-macro.S into the common space ARM: at91: remove useless at91_sysirq_mask_rtx ARM: at91: remove useless config MACH_AT91SAM9_DT ARM: at91: remove useless config MACH_AT91RM9200_DT ARM: at91: remove unused mach/memory.h ARM: at91: remove useless header file includes ARM: at91: remove unneeded header file rtc: at91/Kconfig: remove useless options ARM: at91/Documentation: add a README for Atmel SoCs ...
Diffstat (limited to 'arch/arm/mach-exynos/exynos.c')
-rw-r--r--arch/arm/mach-exynos/exynos.c39
1 files changed, 2 insertions, 37 deletions
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index c13d0837fa8c..2c844393cc4b 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -27,20 +27,16 @@
#include <asm/mach/map.h>
#include <asm/memory.h>
+#include <mach/map.h>
+
#include "common.h"
#include "mfc.h"
#include "regs-pmu.h"
-#include "regs-sys.h"
void __iomem *pmu_base_addr;
static struct map_desc exynos4_iodesc[] __initdata = {
{
- .virtual = (unsigned long)S3C_VA_SYS,
- .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON),
- .length = SZ_64K,
- .type = MT_DEVICE,
- }, {
.virtual = (unsigned long)S5P_VA_SROMC,
.pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
.length = SZ_4K,
@@ -70,11 +66,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
static struct map_desc exynos5_iodesc[] __initdata = {
{
- .virtual = (unsigned long)S3C_VA_SYS,
- .pfn = __phys_to_pfn(EXYNOS5_PA_SYSCON),
- .length = SZ_64K,
- .type = MT_DEVICE,
- }, {
.virtual = (unsigned long)S5P_VA_SROMC,
.pfn = __phys_to_pfn(EXYNOS5_PA_SROMC),
.length = SZ_4K,
@@ -213,32 +204,6 @@ static void __init exynos_init_irq(void)
static void __init exynos_dt_machine_init(void)
{
- struct device_node *i2c_np;
- const char *i2c_compat = "samsung,s3c2440-i2c";
- unsigned int tmp;
- int id;
-
- /*
- * Exynos5's legacy i2c controller and new high speed i2c
- * controller have muxed interrupt sources. By default the
- * interrupts for 4-channel HS-I2C controller are enabled.
- * If node for first four channels of legacy i2c controller
- * are available then re-configure the interrupts via the
- * system register.
- */
- if (soc_is_exynos5()) {
- for_each_compatible_node(i2c_np, NULL, i2c_compat) {
- if (of_device_is_available(i2c_np)) {
- id = of_alias_get_id(i2c_np, "i2c");
- if (id < 4) {
- tmp = readl(EXYNOS5_SYS_I2C_CFG);
- writel(tmp & ~(0x1 << id),
- EXYNOS5_SYS_I2C_CFG);
- }
- }
- }
- }
-
/*
* This is called from smp_prepare_cpus if we've built for SMP, but
* we still need to set it up for PM and firmware ops if not.