diff options
| author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2015-03-27 02:35:48 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene@kernel.org> | 2015-03-27 02:35:48 +0900 |
| commit | 89366409748c2de0521cf4303bfb1247676882df (patch) | |
| tree | 152d2c0d10f767ba382b7b10468dd1ef662ea99c /arch/arm/mach-exynos/firmware.c | |
| parent | dc1b9448d23deb51ad74a873392402560955dbc2 (diff) | |
ARM: EXYNOS: add AFTR mode support for Exynos3250
AFTR mode support brings reduced energy consumption and is
a prerequisite for more advanced W-AFTR/LPA power saving modes.
AFTR mode has been already supported on other Exynos SoCs for
few years and this patch adds its support for Exynos3250 SoC.
The differences in Exynos3250 SoC AFTR mode support when compared
to Exynos4x12 SoCs are:
- different secure firmware calls are used
- different S5P_WAKEUP_MASK wakeup mask is used
- S5P_WAKEUP_MASK2 wakeup mask needs to be set in addition to
the standard S5P_WAKEUP_MASK one
- C2_STATE BOOT mode flag needs to be set/cleared pre/post AFTR
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Diffstat (limited to 'arch/arm/mach-exynos/firmware.c')
| -rw-r--r-- | arch/arm/mach-exynos/firmware.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index 27b8ae3e1f89..1bd35763f12e 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -48,7 +48,13 @@ static int exynos_do_idle(unsigned long mode) __raw_writel(virt_to_phys(exynos_cpu_resume_ns), sysram_ns_base_addr + 0x24); __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); - exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0); + if (soc_is_exynos3250()) { + exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE, + SMC_POWERSTATE_IDLE, 0); + exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER, + SMC_POWERSTATE_IDLE, 0); + } else + exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0); break; case FW_DO_IDLE_SLEEP: exynos_smc(SMC_CMD_SLEEP, 0, 0, 0); |