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authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 14:38:28 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 14:38:28 -0800
commit6a57d104c8cb5b6adad6784b4ce6e2f7f9961a3a (patch)
treec3ff93b006d7483ccee09799d215b03b1bbc3f1b /arch/arm/mach-exynos/pm.c
parentcebfa85eb86d92bf85d3b041c6b044184517a988 (diff)
parentc91321e8ff338a88a9272dcd938f085955cd5846 (diff)
Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Soc updates, take 2, from Olof Johansson: "This is the second batch of SoC updates for the 3.8 merge window, containing parts that had dependencies on earlier branches such that we couldn't include them with the first branch. These are general updates for Samsung Exynos, Renesas/shmobile and a topic branch that adds SMP support to Altera's socfpga platform." Fix up conflicts mostly as per Olof. * tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: EXYNOS: Clock settings for SATA and SATA PHY ARM: EXYNOS: Add ARM down clock support ARM: EXYNOS: Fix i2c suspend/resume for legacy controller ARM: EXYNOS: Add aliases for i2c controller ARM: EXYNOS: Setup legacy i2c controller interrupts sh: clkfwk: fixup unsed variable warning Revert "ARM: shmobile: r8a7779: Replace modify_scu_cpu_psr with scu_power_mode" Revert "ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_mode" Revert "ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_mode" ARM: highbank: use common debug_ll_io_init ARM: shmobile: sh7372: sh7372_fsiXck_clk become non-global ARM: shmobile: sh7372: remove fsidivx clock ARM: socfpga: mark secondary_trampoline as cpuinit socfpga: map uart into virtual address space so that early_printk() works ARM: socfpga: fix build break for allyesconfig ARM: socfpga: Enable SMP for socfpga ARM: EXYNOS: Add dp clock support for EXYNOS5 ARM: SAMSUNG: call clk_get_rate for debugfs rate files ARM: SAMSUNG: add clock_tree debugfs file in clock
Diffstat (limited to 'arch/arm/mach-exynos/pm.c')
-rw-r--r--arch/arm/mach-exynos/pm.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 8df6ec547f78..b9b539cac81e 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -62,6 +62,10 @@ static struct sleep_save exynos4_vpll_save[] = {
SAVE_ITEM(EXYNOS4_VPLL_CON1),
};
+static struct sleep_save exynos5_sys_save[] = {
+ SAVE_ITEM(EXYNOS5_SYS_I2C_CFG),
+};
+
static struct sleep_save exynos_core_save[] = {
/* SROM side */
SAVE_ITEM(S5P_SROM_BW),
@@ -101,6 +105,7 @@ static void exynos_pm_prepare(void)
s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save));
s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save));
} else {
+ s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
/* Disable USE_RETENTION of JPEG_MEM_OPTION */
tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
@@ -304,6 +309,10 @@ static void exynos_pm_resume(void)
__raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
__raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
+ if (soc_is_exynos5250())
+ s3c_pm_do_restore(exynos5_sys_save,
+ ARRAY_SIZE(exynos5_sys_save));
+
s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
if (!soc_is_exynos5250()) {