diff options
author | Nicolin Chen <Guangyu.Chen@freescale.com> | 2014-04-08 19:10:25 +0800 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2014-08-27 18:11:47 -0500 |
commit | 122428fbb8bdaa022da0fe1f3e1eaf44a80af487 (patch) | |
tree | d97c7129593de57c49b04e531c691ecf73d4ec93 /arch/arm/mach-imx/clk-imx6sx.c | |
parent | 8f5fda5968ef78e963943f611f657edd7f267e98 (diff) |
ENGR00307635-4 ARM: imx6sx: Use 24.576MHz for both SSI and SAI clocks
SAI derives its mclk from SSI_CLK, so this patch sets a default value for them.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx6sx.c')
-rw-r--r-- | arch/arm/mach-imx/clk-imx6sx.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c index 5b9735c7388a..823ce0f5fe75 100644 --- a/arch/arm/mach-imx/clk-imx6sx.c +++ b/arch/arm/mach-imx/clk-imx6sx.c @@ -493,6 +493,13 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) clk_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 48000000); clk_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 48000000); + clk_set_parent(clks[IMX6SX_CLK_SSI1_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); + clk_set_parent(clks[IMX6SX_CLK_SSI2_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); + clk_set_parent(clks[IMX6SX_CLK_SSI3_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); + clk_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000); + clk_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000); + clk_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000); + clk_set_parent(clks[IMX6SX_CLK_ESAI_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); clk_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000); |