summaryrefslogtreecommitdiff
path: root/arch/arm/mach-imx/common.h
diff options
context:
space:
mode:
authorRobin Gong <yibin.gong@nxp.com>2017-02-17 15:48:56 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:25:52 +0800
commit6b79bd53a7011805a88e65a39d2cf6b255891439 (patch)
tree7e47c6e00dd9615c5aa41bb10a13a5439ea2cc72 /arch/arm/mach-imx/common.h
parent8fe6c34a73140b84e09d7a55302e5e1b21e9abd8 (diff)
MLK-13994-1: ARM: imx7ulp: add acknowledgement for vlls message notification
Now, M4 rpmsg add free buffer feature that free the reciever buffer and update some rpmsg structure data in share memory(DDR) once M4 receive the message from A7 side, that means M4 will access DDR after it receive the vlls message(A7 enter VLLS mode quickly), thus M4 hang because DDR in slef-refresh... This patch move the vlls message notification ahead to driver suspend and add acknowledgement to make sure no any DDR access comes from M4 side after A7 enter suspend. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx/common.h')
-rw-r--r--arch/arm/mach-imx/common.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 2c80a3b4a4cd..3098867e8611 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -201,7 +201,6 @@ void imx7ulp_cpu_resume(void);
void imx6_suspend(void __iomem *ocram_vbase);
void imx7_suspend(void __iomem *ocram_vbase);
void imx7ulp_suspend(void __iomem *ocram_vbase);
-void pm_vlls_notify_m4(bool enter);
#else
static inline void v7_cpu_resume(void) {}
static inline void ca7_cpu_resume(void) {}
@@ -211,7 +210,6 @@ static inline void imx7ulp_cpu_resume(void) {}
static inline void imx6_suspend(void __iomem *ocram_vbase) {}
static inline void imx7_suspend(void __iomem *ocram_vbase) {}
static inline void imx7ulp_suspend(void __iomem *ocram_vbase) {}
-void pm_vlls_notify_m4(bool enter) {}
#endif
#ifdef CONFIG_SOC_IMX7ULP