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authorAnson Huang <b20788@freescale.com>2014-10-10 10:32:59 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-01-15 21:18:21 -0600
commit519eeb6b5b240d1e6af34e3a2f3e21237f7387cc (patch)
treeb8e2c0960be6136fa3112e69b9a762e8be8a87d4 /arch/arm/mach-imx/headsmp.S
parent6d8a5421fe9a9faed5cf7666e3c68758c4b5d606 (diff)
MLK-9669-3 arm: imx: set SCU CPU power status register correctly
Set the SCU CPU Power status register to reflect the correct status of a CPU (active/inactive/not-present). Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/headsmp.S')
-rw-r--r--arch/arm/mach-imx/headsmp.S50
1 files changed, 49 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
index de5047c8a6c8..3ec99d53d7eb 100644
--- a/arch/arm/mach-imx/headsmp.S
+++ b/arch/arm/mach-imx/headsmp.S
@@ -1,5 +1,5 @@
/*
- * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011-2014 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
@@ -12,7 +12,16 @@
#include <linux/linkage.h>
#include <linux/init.h>
+#include <asm/asm-offsets.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/smp_scu.h>
+#define SCU_CPU_STATUS 0x08
+
+ .section ".text.head", "ax"
+.extern imx_scu_base
+
+#ifdef CONFIG_SMP
diag_reg_offset:
.word g_diag_reg - .
@@ -27,5 +36,44 @@ diag_reg_offset:
ENTRY(v7_secondary_startup)
bl v7_invalidate_l1
set_diag_reg
+
+ /* Set the CPU status in SCU CPU status register. */
+ mrc p15, 0, r0, c0, c0, 5
+ and r0, r0, #3
+ mrc p15, 4, r1, c15, c0, 0
+ ldr r2, =SCU_CPU_STATUS
+ orr r2, r2, r0
+ ldr r0, =SCU_PM_NORMAL
+ strb r0, [r1, r2]
+
b secondary_startup
ENDPROC(v7_secondary_startup)
+#endif
+
+#ifdef CONFIG_ARM_CPU_SUSPEND
+/*
+ * The following code must assume it is running from physical address
+ * where absolute virtual addresses to the data section have to be
+ * turned into relative ones.
+ */
+
+#ifdef CONFIG_CACHE_L2X0
+ .macro pl310_resume
+ adr r0, l2x0_saved_regs_offset
+ ldr r2, [r0]
+ add r2, r2, r0
+ ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
+ ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
+ str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
+ mov r1, #0x1
+ str r1, [r0, #L2X0_CTRL] @ re-enable L2
+ .endm
+
+l2x0_saved_regs_offset:
+ .word l2x0_saved_regs - .
+
+#else
+ .macro pl310_resume
+ .endm
+#endif
+#endif