diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2016-04-01 20:16:48 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:24:35 +0800 |
commit | 67b926628106d759308b296061b0667c3d5d5ec4 (patch) | |
tree | 43635d19882c389457a853f183bfd52d2bca9e77 /arch/arm/mach-imx/pm-imx6.c | |
parent | 97b0bad16b634dd8c734eb125ab4a028edd432d2 (diff) |
MLK-12627-05 ARM: imx: add suspend support for i.mx6ul
Add suspend/resume support for i.MX6ULL.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx/pm-imx6.c')
-rw-r--r-- | arch/arm/mach-imx/pm-imx6.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index 0ae883d11450..cd678c45a09d 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -1,5 +1,5 @@ /* - * Copyright 2011-2015 Freescale Semiconductor, Inc. + * Copyright 2011-2016 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. * * The code contained herein is licensed under the GNU General Public @@ -805,7 +805,6 @@ static int imx6q_pm_enter(suspend_state_t state) } } #endif - switch (state) { case PM_SUSPEND_STANDBY: imx6_set_lpm(STOP_POWER_ON); @@ -836,6 +835,7 @@ static int imx6q_pm_enter(suspend_state_t state) imx6_enable_rbc(true); imx_gpc_pre_suspend(true); imx_anatop_pre_suspend(); + imx6_console_save(console_saved_reg); if (cpu_is_imx6sx() && imx_gpc_is_mf_mix_off()) { ccm_ccgr4 = readl_relaxed(ccm_base + CCGR4); ccm_ccgr6 = readl_relaxed(ccm_base + CCGR6); @@ -876,6 +876,7 @@ static int imx6q_pm_enter(suspend_state_t state) } if (cpu_is_imx6q() || cpu_is_imx6dl()) imx_smp_prepare(); + imx6_console_restore(console_saved_reg); imx_anatop_post_resume(); imx_gpc_post_resume(); imx6_enable_rbc(false); @@ -1099,7 +1100,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) } /* need to overwrite the value for some mmdc registers */ - if ((cpu_is_imx6sx() || cpu_is_imx6ul()) && + if ((cpu_is_imx6sx() || cpu_is_imx6ul() || cpu_is_imx6ull()) && pm_info->ddr_type != IMX_DDR_TYPE_LPDDR2) { pm_info->mmdc_val[20][1] = (pm_info->mmdc_val[20][1] & 0xffff0000) | 0x0202; @@ -1118,7 +1119,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) pm_info->mmdc_val[32][1] = 0xa1310003; } - if (cpu_is_imx6ul() && + if ((cpu_is_imx6ul() || cpu_is_imx6ull()) && pm_info->ddr_type == IMX_DDR_TYPE_LPDDR2) { pm_info->mmdc_val[0][1] = 0x8000; pm_info->mmdc_val[2][1] = 0xa1390003; @@ -1267,8 +1268,17 @@ void __init imx6sx_pm_init(void) void __init imx6ul_pm_init(void) { + struct device_node *np; + if (imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2) imx6_pm_common_init(&imx6ul_lpddr2_pm_data); else imx6_pm_common_init(&imx6ul_pm_data); + + if (cpu_is_imx6ull()) { + np = of_find_node_by_path( + "/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000"); + if (np) + console_base = of_iomap(np, 0); + } } |