diff options
| author | Anson Huang <b20788@freescale.com> | 2015-08-18 15:52:13 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:21:57 +0800 |
| commit | d9929e0d7db2c152c497435d800b9fa9bc13cee7 (patch) | |
| tree | 74167f5fbb088e37102939eef99cf9c9aabf135c /arch/arm/mach-imx/pm-imx6.c | |
| parent | 0397b19538a2fefd7866ba2a473db5a1f06df8cd (diff) | |
MLK-11375-1 ARM: imx: bypass pmic ready for imx6sx
i.MX6SX has same design as i.MX6SL which has bypass
pmic ready signal, as we do NOT enable this function,
so need to bypass it during suspend/resume.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/pm-imx6.c')
| -rw-r--r-- | arch/arm/mach-imx/pm-imx6.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index 87a6695e264c..e3863285a370 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -377,7 +377,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode) val |= 0x2 << BP_CLPCR_LPM; val &= ~BM_CLPCR_VSTBY; val &= ~BM_CLPCR_SBYOS; - if (cpu_is_imx6sl()) + if (cpu_is_imx6sl() || cpu_is_imx6sx()) val |= BM_CLPCR_BYPASS_PMIC_READY; if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul() || cpu_is_imx6ull()) |