diff options
| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-16 15:54:37 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-09-23 12:40:42 +0200 |
| commit | 549efeaa96d8bb56f82cb2d788b25360ff56263b (patch) | |
| tree | afd252b159cd3cd83977e175123c2a8cdda73e52 /arch/arm/mach-ixp4xx/goramo_mlr.c | |
| parent | 73d58890be304f94f6787a83fab4455534edac72 (diff) | |
MIPS: SNI: Fix spurious interrupts
[ Upstream commit b959b97860d0fee8c8f6a3e641d3c2ad76eab6be ]
On A20R machines the interrupt pending bits in cause register need to be
updated by requesting the chipset to do it. This needs to be done to
find the interrupt cause and after interrupt service. In
commit 0b888c7f3a03 ("MIPS: SNI: Convert to new irq_chip functions") the
function to do after service update got lost, which caused spurious
interrupts.
Fixes: 0b888c7f3a03 ("MIPS: SNI: Convert to new irq_chip functions")
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/mach-ixp4xx/goramo_mlr.c')
0 files changed, 0 insertions, 0 deletions