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authorArnd Bergmann <arnd@arndb.de>2012-03-15 21:05:52 +0000
committerArnd Bergmann <arnd@arndb.de>2012-03-15 21:05:52 +0000
commit38abdcd0d0689aaca94e740ac67a952c7918caef (patch)
tree83051487c15c3a062eb4dbff16c13e517c309a78 /arch/arm/mach-msm/idle.S
parent709baa67c676a187a63c0f0f40efceb3fb1eef72 (diff)
parent61b80086a525c8a6081257ae40da5dee2bcaee16 (diff)
Merge branch 'for-armsoc' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm into next/soc2
Conflicts: arch/arm/mach-tegra/common.c arch/arm/mach-ux500/devices-common.c This resolves two conflicts and lets us merge the exynos5 branch cleanly. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-msm/idle.S')
-rw-r--r--arch/arm/mach-msm/idle.S36
1 files changed, 0 insertions, 36 deletions
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S
deleted file mode 100644
index 6a94f0527137..000000000000
--- a/arch/arm/mach-msm/idle.S
+++ /dev/null
@@ -1,36 +0,0 @@
-/* arch/arm/mach-msm/include/mach/idle.S
- *
- * Idle processing for MSM7K - work around bugs with SWFI.
- *
- * Copyright (c) 2007 QUALCOMM Incorporated.
- * Copyright (C) 2007 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-
-ENTRY(arch_idle)
-#ifdef CONFIG_MSM7X00A_IDLE
- mrc p15, 0, r1, c1, c0, 0 /* read current CR */
- bic r0, r1, #(1 << 2) /* clear dcache bit */
- bic r0, r0, #(1 << 12) /* clear icache bit */
- mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */
-
- mov r0, #0 /* prepare wfi value */
- mcr p15, 0, r0, c7, c10, 0 /* flush the cache */
- mcr p15, 0, r0, c7, c10, 4 /* memory barrier */
- mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */
-
- mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */
-#endif
- mov pc, lr