diff options
| author | Baruch Siach <baruch@tkos.co.il> | 2010-06-21 08:16:00 +0300 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-07-26 14:18:29 +0200 |
| commit | f747847e8f0312ddc50fe7cb7ed4f6399ec154e0 (patch) | |
| tree | a509e75f83c2835a756ef2c1a1c256c9802268b1 /arch/arm/mach-mx25/clock.c | |
| parent | 94d359586480fd6d22eccec5dc3693d7d0f68928 (diff) | |
mx25: add support for the CSI device
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx25/clock.c')
| -rw-r--r-- | arch/arm/mach-mx25/clock.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index 2bb4f1d73cbb..1a58cae4d5e8 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c @@ -139,6 +139,11 @@ static unsigned long get_rate_lcdc(struct clk *clk) return get_rate_per(7); } +static unsigned long get_rate_csi(struct clk *clk) +{ + return get_rate_per(0); +} + static unsigned long get_rate_otg(struct clk *clk) { unsigned long cctl = readl(CRM_BASE + CCM_CCTL); @@ -211,6 +216,8 @@ DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL); DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL, NULL, NULL); DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0, 7, NULL, NULL, &lcdc_ahb_clk); +DEFINE_CLOCK(csi_ahb_clk, 0, CCM_CGCR0, 18, get_rate_csi, NULL, NULL); +DEFINE_CLOCK(csi_per_clk, 0, CCM_CGCR0, 0, get_rate_csi, NULL, &csi_ahb_clk); DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk); DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk); DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk); @@ -232,6 +239,7 @@ DEFINE_CLOCK(wdt_clk, 0, CCM_CGCR2, 19, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(ssi1_clk, 0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &ssi1_per_clk); DEFINE_CLOCK(ssi2_clk, 1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &ssi2_per_clk); DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL); +DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk); #define _REGISTER_CLOCK(d, n, c) \ { \ @@ -269,6 +277,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("imx-wdt.0", NULL, wdt_clk) _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) + _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk) _REGISTER_CLOCK(NULL, "audmux", audmux_clk) }; @@ -284,8 +293,9 @@ int __init mx25_clocks_init(void) __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1); __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2); - /* Clock source for lcdc is upll */ - __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7), CRM_BASE + 0x64); + /* Clock source for lcdc and csi is upll */ + __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0), + CRM_BASE + 0x64); mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); |