ENGR00120394-1 imx: remove unneeded spba related code

The spba defaults to all masters enabled and this is fine as
all chips only have ARM and SDMA as masters.

Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>

3 files changed, 3 insertions, 47 deletions

diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index c8d69aa7108e..e1f91405c9e0 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -20,7 +20,6 @@
 
 #include <mach/hardware.h>
 #include <mach/mmc.h>
-#include <mach/spba.h>
 #include <mach/sdma.h>
 
 #include "iomux.h"
@@ -256,9 +255,6 @@ static struct platform_device mxcspi3_device = {
 
 static inline void mxc_init_spi(void)
 {
-	spba_take_ownership(SPBA_CSPI2, SPBA_MASTER_A);
-	spba_take_ownership(SPBA_CSPI3, SPBA_MASTER_A);
-
 #ifdef CONFIG_SPI_MXC_SELECT1
 	if (platform_device_register(&mxcspi1_device) < 0)
 		printk(KERN_ERR "Error: Registering the SPI Controller_1\n");
@@ -439,13 +435,6 @@ int __init mxc_register_gpios(void)
 	return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
 }
 
-static inline void mxc_init_ssi(void)
-{
-	/* SPBA configuration for SSI - SDMA and MCU are set */
-	spba_take_ownership(SPBA_SSI1, SPBA_MASTER_A | SPBA_MASTER_C);
-	spba_take_ownership(SPBA_SSI2, SPBA_MASTER_A | SPBA_MASTER_C);
-}
-
 static struct platform_device mxc_dma_device = {
 	.name = "mxc_dma",
 	.id = 0,
@@ -602,7 +591,6 @@ static int __init mxc_init_devices(void)
 	mxc_init_spi();
 	mxc_init_i2c();
 	mxc_init_dma();
-	mxc_init_ssi();
 	mxc_init_surround_audio();
 	mxc_init_rtc();
 	imx_init_adc();
diff --git a/arch/arm/mach-mx25/serial.c b/arch/arm/mach-mx25/serial.c
index d71dd1082f2f..3029eb49c2ea 100644
--- a/arch/arm/mach-mx25/serial.c
+++ b/arch/arm/mach-mx25/serial.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -22,7 +22,6 @@
 #include <linux/serial.h>
 #include <mach/hardware.h>
 #include <mach/mxc_uart.h>
-#include <mach/spba.h>
 #include "serial.h"
 #include "board-mx25_3stack.h"
 
@@ -57,7 +56,6 @@ static uart_mxc_port mxc_ports[] = {
 	       .dma_rxbuf_size = UART1_DMA_RXBUFSIZE,
 	       .rx_threshold = UART1_UFCR_RXTL,
 	       .tx_threshold = UART1_UFCR_TXTL,
-	       .shared = UART1_SHARED_PERI,
 	       .dma_tx_id = MXC_DMA_UART1_TX,
 	       .dma_rx_id = MXC_DMA_UART1_RX,
 	       .rxd_mux = MXC_UART_RXDMUX,
@@ -83,7 +81,6 @@ static uart_mxc_port mxc_ports[] = {
 	       .dma_rxbuf_size = UART2_DMA_RXBUFSIZE,
 	       .rx_threshold = UART2_UFCR_RXTL,
 	       .tx_threshold = UART2_UFCR_TXTL,
-	       .shared = UART2_SHARED_PERI,
 	       .dma_tx_id = MXC_DMA_UART2_TX,
 	       .dma_rx_id = MXC_DMA_UART2_RX,
 	       .rxd_mux = MXC_UART_IR_RXDMUX,
@@ -110,7 +107,6 @@ static uart_mxc_port mxc_ports[] = {
 	       .dma_rxbuf_size = UART3_DMA_RXBUFSIZE,
 	       .rx_threshold = UART3_UFCR_RXTL,
 	       .tx_threshold = UART3_UFCR_TXTL,
-	       .shared = UART3_SHARED_PERI,
 	       .dma_tx_id = MXC_DMA_UART3_TX,
 	       .dma_rx_id = MXC_DMA_UART3_RX,
 	       .rxd_mux = MXC_UART_RXDMUX,
@@ -138,7 +134,6 @@ static uart_mxc_port mxc_ports[] = {
 	       .dma_rxbuf_size = UART4_DMA_RXBUFSIZE,
 	       .rx_threshold = UART4_UFCR_RXTL,
 	       .tx_threshold = UART4_UFCR_TXTL,
-	       .shared = UART4_SHARED_PERI,
 	       .dma_tx_id = MXC_DMA_UART4_TX,
 	       .dma_rx_id = MXC_DMA_UART4_RX,
 	       .rxd_mux = MXC_UART_RXDMUX,
@@ -166,7 +161,6 @@ static uart_mxc_port mxc_ports[] = {
 	       .dma_rxbuf_size = UART5_DMA_RXBUFSIZE,
 	       .rx_threshold = UART5_UFCR_RXTL,
 	       .tx_threshold = UART5_UFCR_TXTL,
-	       .shared = UART5_SHARED_PERI,
 	       .dma_tx_id = MXC_DMA_UART5_TX,
 	       .dma_rx_id = MXC_DMA_UART5_RX,
 	       .rxd_mux = MXC_UART_RXDMUX,
@@ -224,29 +218,13 @@ static int __init mxc_init_uart(void)
 	platform_device_register(&mxc_uart_device1);
 	platform_device_register(&mxc_uart_device2);
 
-	/* Grab ownership of shared UARTs 3 and 4, only when enabled */
 #if UART3_ENABLED == 1
-#if UART3_DMA_ENABLE == 1
-	spba_take_ownership(UART3_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C));
-#else
-	spba_take_ownership(UART3_SHARED_PERI, SPBA_MASTER_A);
-#endif				/* UART3_DMA_ENABLE */
 	platform_device_register(&mxc_uart_device3);
 #endif				/* UART3_ENABLED */
 #if UART4_ENABLED == 1
-#if UART4_DMA_ENABLE == 1
-	spba_take_ownership(UART4_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C));
-#else
-	spba_take_ownership(UART4_SHARED_PERI, SPBA_MASTER_A);
-#endif				/* UARTr_DMA_ENABLE */
 	platform_device_register(&mxc_uart_device4);
 #endif				/* UART4_ENABLED */
 #if UART5_ENABLED == 1
-#if UART5_DMA_ENABLE == 1
-	spba_take_ownership(UART5_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C));
-#else
-	spba_take_ownership(UART5_SHARED_PERI, SPBA_MASTER_A);
-#endif				/* UART5_DMA_ENABLE */
 	platform_device_register(&mxc_uart_device5);
 #endif				/* UART5_ENABLED */
 
diff --git a/arch/arm/mach-mx25/serial.h b/arch/arm/mach-mx25/serial.h
index 4f53b09db1be..d6cc3d6eef95 100644
--- a/arch/arm/mach-mx25/serial.h
+++ b/arch/arm/mach-mx25/serial.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -124,35 +124,25 @@
  * like this for each UART port.
  */
 #define UART1_INT3              (-1)
-/*!
- * This specifies if the UART is a shared peripheral. It holds the shared
- * peripheral number if it is shared or -1 if it is not shared. There exists
- * a define like this for each UART port.
- */
-#define UART1_SHARED_PERI       (-1)
 /* UART 2 configuration */
 #define UART2_MUX_INTS          INTS_MUXED
 #define UART2_INT1              MXC_INT_UART2
 #define UART2_INT2              (-1)
 #define UART2_INT3              (-1)
-#define UART2_SHARED_PERI       (-1)
 /* UART 3 configuration */
 #define UART3_MUX_INTS          INTS_MUXED
 #define UART3_INT1              MXC_INT_UART3
 #define UART3_INT2              (-1)
 #define UART3_INT3              (-1)
-#define UART3_SHARED_PERI       SPBA_UART3
 /* UART 4 configuration */
 #define UART4_MUX_INTS          INTS_MUXED
 #define UART4_INT1              MXC_INT_UART4
 #define UART4_INT2              (-1)
 #define UART4_INT3              (-1)
-#define UART4_SHARED_PERI       SPBA_UART4
 /* UART 5 configuration */
 #define UART5_MUX_INTS          INTS_MUXED
 #define UART5_INT1              MXC_INT_UART5
 #define UART5_INT2              (-1)
 #define UART5_INT3              (-1)
-#define UART5_SHARED_PERI       SPBA_UART5
 
 #endif				/* __ARCH_ARM_MACH_MX25_SERIAL_H__ */