diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2011-04-11 12:28:27 -0500 |
|---|---|---|
| committer | Alex Gonzalez <alex.gonzalez@digi.com> | 2011-08-01 09:51:26 +0200 |
| commit | 92ac2af40a1f837463df1580259b5a3eb2023b56 (patch) | |
| tree | db2851f6ec95e7a80d807b8bd59bb01f62430a70 /arch/arm/mach-mx5/clock_mx50.c | |
| parent | defa3187ce73024ba9709680bdb605013ce7895b (diff) | |
ENGR00142006: MX50- Fix audio noise issue.
Clicking sound can be heard whenever the system transitions between LPAPM
mode and normal mode. Sometimes channel swapping also occurs. The issue
can be reproduced only when tested with a mono-tone audio clip.
The issue was caused by stalling of the bus masters when the DDR
frequency was being changed. Fix is to allow SDMA to access IRAM
via QoS (ports 0 and 1) during the DDR frequency transition.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>
Diffstat (limited to 'arch/arm/mach-mx5/clock_mx50.c')
| -rw-r--r-- | arch/arm/mach-mx5/clock_mx50.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/clock_mx50.c b/arch/arm/mach-mx5/clock_mx50.c index 01359035f515..6bcfbeb02858 100644 --- a/arch/arm/mach-mx5/clock_mx50.c +++ b/arch/arm/mach-mx5/clock_mx50.c @@ -826,6 +826,8 @@ static unsigned long _clk_main_bus_get_rate(struct clk *clk) static int _clk_main_bus_set_parent(struct clk *clk, struct clk *parent) { u32 reg, mux; + struct timespec nstimeofday; + struct timespec curtime; mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, &lp_apm_clk); @@ -833,6 +835,14 @@ static int _clk_main_bus_set_parent(struct clk *clk, struct clk *parent) reg |= (mux << MX50_CCM_CBCDR_PERIPH_CLK_SEL_OFFSET); __raw_writel(reg, MXC_CCM_CBCDR); + getnstimeofday(&nstimeofday); + while (__raw_readl(MXC_CCM_CDHIPR) & + MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY) { + getnstimeofday(&curtime); + if (curtime.tv_nsec - nstimeofday.tv_nsec > SPIN_DELAY) + panic("_clk_main_bus_set_parent failed\n"); + } + return 0; } |