diff options
| author | Mahesh Mahadevan <r9aadq@freescale.com> | 2011-11-10 05:54:37 -0600 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-01-09 21:06:01 +0800 |
| commit | 3bf003c990c97187e5c939215e0799b0739daa9a (patch) | |
| tree | 9eefde55da73818c3d9b5e9931c3118a3b821b3f /arch/arm/mach-mx6/board-mx6q_sabrelite.c | |
| parent | c32827e3bf45049966fbfaa783245cccf9989fd4 (diff) | |
ENGR00161926 Change the PAD settings on SD3 Write Protect
Update the PAD settings to lower pull-up resistor as this was
causing WP to not be detected.
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/board-mx6q_sabrelite.c')
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabrelite.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_sabrelite.c b/arch/arm/mach-mx6/board-mx6q_sabrelite.c index 4d791f7c379a..8fef605b8929 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabrelite.c +++ b/arch/arm/mach-mx6/board-mx6q_sabrelite.c @@ -80,6 +80,10 @@ #define MX6Q_SABRELITE_CAP_TCH_INT1 IMX_GPIO_NR(1, 9) #define MX6Q_SABRELITE_USB_HUB_RESET IMX_GPIO_NR(7, 12) +#define MX6Q_SABRELITE_SD3_WP_PADCFG (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + void __init early_console_setup(unsigned long base, struct clk *clk); extern struct regulator *(*get_cpu_regulator)(void); @@ -288,7 +292,7 @@ static iomux_v3_cfg_t mx6q_sabrelite_pads[] = { MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ, MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ, MX6Q_PAD_SD3_DAT5__GPIO_7_0, /* J18 - SD3_CD */ - MX6Q_PAD_SD3_DAT4__GPIO_7_1, /* J18 - SD3_WP */ + NEW_PAD_CTRL(MX6Q_PAD_SD3_DAT4__GPIO_7_1, MX6Q_SABRELITE_SD3_WP_PADCFG), /* USDHC4 */ MX6Q_PAD_SD4_CLK__USDHC4_CLK_50MHZ, |