diff options
| author | Robin Gong <b38343@freescale.com> | 2012-08-11 16:36:35 +0800 |
|---|---|---|
| committer | Robin Gong <b38343@freescale.com> | 2012-08-13 10:42:07 +0800 |
| commit | 0dbe59545a8b2b86d7d0a966b28e4e7f99cef426 (patch) | |
| tree | 98d077a5b40ba3d9e8553de09b95e8cbb860f6d6 /arch/arm/mach-mx6/board-mx6sl_arm2.c | |
| parent | 1f4aead453351d7d9658f6ebb31f6deaea3262b6 (diff) | |
ENGR00220153 cpufreq mx6: new cpu set point and add VDDSOC/PU adjust
1.add new cpu setpoint: replace 498Mhz with 672Mhz,and remove 198Mhz.
but now 498Mhz seems not stable enough, comment now, test enough to
add it. Rigel kept unchange now.
2.support adjusting VDDSOC/VDDPU when cpu frequency change.
Signed-off-by: Robin Gong <b38343@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/board-mx6sl_arm2.c')
| -rwxr-xr-x | arch/arm/mach-mx6/board-mx6sl_arm2.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index 4e827ee97c09..0c5166627320 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -133,6 +133,9 @@ static int spdc_sel; static int max17135_regulator_init(struct max17135 *max17135); struct clk *extern_audio_root; +extern char *gp_reg_id; +extern char *soc_reg_id; +extern char *pu_reg_id; extern int __init mx6sl_arm2_init_pfuze100(u32 int_gpio); enum sd_pad_mode { @@ -632,7 +635,13 @@ static struct i2c_board_info mxc_i2c2_board_info[] __initdata = { }; static struct mxc_dvfs_platform_data mx6sl_arm2_dvfscore_data = { + #ifdef CONFIG_MX6_INTER_LDO_BYPASS + .reg_id = "VDDCORE", + #else .reg_id = "cpu_vddgp", + .soc_id = "cpu_vddsoc", + .pu_id = "cpu_vddvpu", + #endif .clk1_id = "cpu_clk", .clk2_id = "gpc_dvfs_clk", .gpc_cntr_offset = MXC_GPC_CNTR_OFFSET, @@ -1228,9 +1237,11 @@ static void __init mx6_arm2_init(void) elan_ts_init(); #ifdef CONFIG_MX6_INTER_LDO_BYPASS - gp_reg_id = "VDDCORE"; + gp_reg_id = mx6sl_arm2_dvfscore_data.reg_id; #else - gp_reg_id = "cpu_vddgp"; + gp_reg_id = mx6sl_arm2_dvfscore_data.reg_id; + soc_reg_id = mx6sl_arm2_dvfscore_data.soc_id; + pu_reg_id = mx6sl_arm2_dvfscore_data.pu_id; mx6_cpu_regulator_init(); #endif |