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authorAnson Huang <b20788@freescale.com>2012-08-19 01:12:59 +0800
committerEric Nelson <eric.nelson@boundarydevices.com>2012-10-12 07:11:49 -0700
commit7fc983dd8f2b666c5e9f67a90e353f355afca483 (patch)
treea97c1bc09e22c41fc67a45bb8863d1a7b0d051ae /arch/arm/mach-mx6/clock.c
parent170d317c8ccf197bfcf2621ba03e1c5c8c7be6dc (diff)
ENGR00220370 [MX6]Fix BUS freq suspend/resume fail in low bus mode
1. BUS freq's set low bus setpoint using delat work, which didn't have mutex lock, so in some scenarios, set high bus freq function can be called at the same time, we need to move mutex lock into these two routine; 2. Using pm notify to make sure bus freq set to high setpoint before supend and restore after resume. 3. Clear build warning. Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/clock.c')
-rw-r--r--arch/arm/mach-mx6/clock.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c
index d9af9f6909c1..08e80dc88a2c 100644
--- a/arch/arm/mach-mx6/clock.c
+++ b/arch/arm/mach-mx6/clock.c
@@ -1280,11 +1280,6 @@ static int _clk_arm_set_rate(struct clk *clk, unsigned long rate)
else
pll1_sw_clk.set_parent(&pll1_sw_clk, &osc_clk);
}
- if (cpu_op_tbl[i].cpu_podf) {
- __raw_writel(cpu_op_tbl[i].cpu_podf, MXC_CCM_CACRR);
- while (__raw_readl(MXC_CCM_CDHIPR))
- ;
- }
pll1_sys_main_clk.set_rate(&pll1_sys_main_clk, cpu_op_tbl[i].pll_rate);
}
/* Make sure pll1_sw_clk is from pll1_sys_main_clk */
@@ -2005,7 +2000,7 @@ static struct clk vdoa_clk[] = {
},
};
-static unsigned long mx6_timer_rate()
+static unsigned long mx6_timer_rate(void)
{
u32 parent_rate = clk_get_rate(&osc_clk);