diff options
| author | Robin Gong <b38343@freescale.com> | 2012-08-11 16:36:35 +0800 |
|---|---|---|
| committer | Robin Gong <b38343@freescale.com> | 2012-08-13 10:42:07 +0800 |
| commit | 0dbe59545a8b2b86d7d0a966b28e4e7f99cef426 (patch) | |
| tree | 98d077a5b40ba3d9e8553de09b95e8cbb860f6d6 /arch/arm/mach-mx6/clock.c | |
| parent | 1f4aead453351d7d9658f6ebb31f6deaea3262b6 (diff) | |
ENGR00220153 cpufreq mx6: new cpu set point and add VDDSOC/PU adjust
1.add new cpu setpoint: replace 498Mhz with 672Mhz,and remove 198Mhz.
but now 498Mhz seems not stable enough, comment now, test enough to
add it. Rigel kept unchange now.
2.support adjusting VDDSOC/VDDPU when cpu frequency change.
Signed-off-by: Robin Gong <b38343@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/clock.c')
| -rw-r--r-- | arch/arm/mach-mx6/clock.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index 61cf37c9a4f8..5b74e2d25c01 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -1272,6 +1272,11 @@ static int _clk_arm_set_rate(struct clk *clk, unsigned long rate) else pll1_sw_clk.set_parent(&pll1_sw_clk, &osc_clk); } + if (cpu_op_tbl[i].cpu_podf) { + __raw_writel(cpu_op_tbl[i].cpu_podf, MXC_CCM_CACRR); + while (__raw_readl(MXC_CCM_CDHIPR)) + ; + } pll1_sys_main_clk.set_rate(&pll1_sys_main_clk, cpu_op_tbl[i].pll_rate); } /* Make sure pll1_sw_clk is from pll1_sys_main_clk */ |