diff options
| author | Dong Aisheng <b29396@freescale.com> | 2011-11-02 19:23:31 +0800 |
|---|---|---|
| committer | Dong Aisheng <b29396@freescale.com> | 2011-11-03 17:33:56 +0800 |
| commit | 7514d01650302d0ae71607bdcd848ba70236a44d (patch) | |
| tree | cfe88819efd02fc88033916b21d33a933dc43d73 /arch/arm/mach-mx6/crm_regs.h | |
| parent | 1ae15ab555a0457c4f2e7aa8194258fdc2881bbb (diff) | |
ENGR00161256-2 mx6q arm2: add flexcan support
Add flexcan support.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/crm_regs.h')
| -rw-r--r-- | arch/arm/mach-mx6/crm_regs.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-mx6/crm_regs.h b/arch/arm/mach-mx6/crm_regs.h index c17f8bb23ee2..5b80070c9fd9 100644 --- a/arch/arm/mach-mx6/crm_regs.h +++ b/arch/arm/mach-mx6/crm_regs.h @@ -282,8 +282,8 @@ #define MXC_CCM_CSCMR2_ESAI_CLK_SEL_OFFSET (19) #define MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV (1 << 11) #define MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV (1 << 10) -#define MXC_CCM_CSCMR2_CAN_CLK_SEL_MASK (0x3F << 2) -#define MXC_CCM_CSCMR2_CAN_CLK_SEL_OFFSET (2) +#define MXC_CCM_CSCMR2_CAN_CLK_PODF_MASK (0x3F << 2) +#define MXC_CCM_CSCMR2_CAN_CLK_PODF_OFFSET (2) /* Define the bits in register CSCDR1 */ #define MXC_CCM_CSCDR1_VPU_AXI_PODF_MASK (0x7 << 25) |