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authorZeng Zhaoming <b32542@freescale.com>2011-06-28 09:15:47 +0800
committerJason Liu <r64343@freescale.com>2012-01-09 20:18:24 +0800
commite9fdc59b7b9f57ac8f886779ded5a8a326f7e9e6 (patch)
treec08e929032e804a36c3df5bdbbf1aa2acb0c2310 /arch/arm/mach-mx6/devices.c
parent2049219609cb178c90c962ba3c8919d9d8d8b314 (diff)
ENGR00139229-1 MX6: Bring up i.MX6 sabreauto with Single core
MSL code for bring up MX6 sabreauto board with Single core. Merged from testbuild:imx6_bringup branch. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com> Singed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Anish Trivedi <anish@freescale.com> Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Jason Chen <b02280@freescale.com> Signed-off-by: Lily Zhang <r58066@freescale.com> Signed-off-by: Sammy He <r62914@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Zeng Zhaoming <b32542@freescale.com> Merged-by: Zeng Zhaoming <b32542@freescale.com> Reviewed-by: Jason Liu <r64343@freescale.com> Reviewed-by: Frank Li <Frank.Li@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/devices.c')
-rw-r--r--arch/arm/mach-mx6/devices.c112
1 files changed, 112 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/devices.c b/arch/arm/mach-mx6/devices.c
new file mode 100644
index 000000000000..f40b5a4d7456
--- /dev/null
+++ b/arch/arm/mach-mx6/devices.c
@@ -0,0 +1,112 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/ipu.h>
+#include <linux/fb.h>
+#include <linux/delay.h>
+#include <linux/uio_driver.h>
+#include <linux/iram_alloc.h>
+#include <linux/fsl_devices.h>
+#include <mach/common.h>
+#include <mach/hardware.h>
+#include <mach/gpio.h>
+
+static struct resource mxc_anatop_resources[] = {
+ {
+ .start = ANATOP_BASE_ADDR,
+ .end = ANATOP_BASE_ADDR + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MXC_INT_ANATOP_TEMPSNSR,
+ .end = MXC_INT_ANATOP_TEMPSNSR,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device anatop_thermal_device = {
+ .name = "anatop_thermal",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(mxc_anatop_resources),
+ .resource = mxc_anatop_resources,
+};
+
+
+static struct mxc_gpio_port mxc_gpio_ports[] = {
+ {
+ .chip.label = "gpio-0",
+ .base = IO_ADDRESS(GPIO1_BASE_ADDR),
+ .irq = MXC_INT_GPIO1_INT15_0_NUM,
+ .irq_high = MXC_INT_GPIO1_INT31_16_NUM,
+ .virtual_irq_start = MXC_GPIO_IRQ_START
+ },
+ {
+ .chip.label = "gpio-1",
+ .base = IO_ADDRESS(GPIO2_BASE_ADDR),
+ .irq = MXC_INT_GPIO2_INT15_0_NUM,
+ .irq_high = MXC_INT_GPIO2_INT31_16_NUM,
+ .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1
+ },
+ {
+ .chip.label = "gpio-2",
+ .base = IO_ADDRESS(GPIO3_BASE_ADDR),
+ .irq = MXC_INT_GPIO3_INT15_0_NUM,
+ .irq_high = MXC_INT_GPIO3_INT31_16_NUM,
+ .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2
+ },
+ {
+ .chip.label = "gpio-3",
+ .base = IO_ADDRESS(GPIO4_BASE_ADDR),
+ .irq = MXC_INT_GPIO4_INT15_0_NUM,
+ .irq_high = MXC_INT_GPIO4_INT31_16_NUM,
+ .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
+ },
+ {
+ .chip.label = "gpio-4",
+ .base = IO_ADDRESS(GPIO5_BASE_ADDR),
+ .irq = MXC_INT_GPIO5_INT15_0_NUM,
+ .irq_high = MXC_INT_GPIO5_INT31_16_NUM,
+ .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 4
+ },
+ {
+ .chip.label = "gpio-5",
+ .base = IO_ADDRESS(GPIO6_BASE_ADDR),
+ .irq = MXC_INT_GPIO6_INT15_0_NUM,
+ .irq_high = MXC_INT_GPIO6_INT31_16_NUM,
+ .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 5
+ },
+ {
+ .chip.label = "gpio-6",
+ .base = IO_ADDRESS(GPIO7_BASE_ADDR),
+ .irq = MXC_INT_GPIO7_INT15_0_NUM,
+ .irq_high = MXC_INT_GPIO7_INT31_16_NUM,
+ .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 6
+ },
+};
+
+int __init mx6q_register_gpios(void)
+{
+ /* 7 ports for Mx6 */
+ return mxc_gpio_init(mxc_gpio_ports, 7);
+}