diff options
author | Anson Huang <b20788@freescale.com> | 2011-07-13 13:52:41 +0800 |
---|---|---|
committer | Jason Liu <r64343@freescale.com> | 2012-07-20 13:14:28 +0800 |
commit | 57e36de548ff4f11e719cf3f61e9553f93652804 (patch) | |
tree | a961a642c33aef4e77fe1e4e147f9d09a8d3367b /arch/arm/mach-mx6/mm.c | |
parent | f012decc8538f4652c56754cb1f4284187482d00 (diff) |
ENGR00152668 [MX6]Enable arch_reset
--OCRAM size is 256KB, confirmed by IC owner, the
OCRAM_Aliasd 0.75MB is mapped to the same 256KB
OCRAM.That means there is only 256KB physical
OCRAM.
--Enable arch_reset function on MX6Q, For SMP, we
need to clear the SRC_GPRx after the secondary
cores brought up, or the wdog reset will fail;
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/mm.c')
-rw-r--r-- | arch/arm/mach-mx6/mm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/mm.c b/arch/arm/mach-mx6/mm.c index 124144d61dce..ab91c38f433e 100644 --- a/arch/arm/mach-mx6/mm.c +++ b/arch/arm/mach-mx6/mm.c @@ -61,7 +61,7 @@ void __init mx6_map_io(void) { iotable_init(mx6_io_desc, ARRAY_SIZE(mx6_io_desc)); mxc_iomux_v3_init(IO_ADDRESS(MX6Q_IOMUXC_BASE_ADDR)); - mxc_arch_reset_init(IO_ADDRESS(WDOG1_BASE_ADDR)); + mxc_arch_reset_init(IO_ADDRESS(MX6Q_WDOG1_BASE_ADDR)); } #ifdef CONFIG_CACHE_L2X0 static int mxc_init_l2x0(void) |