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authorRobin Gong <B38343@freescale.com>2012-06-13 14:44:00 +0800
committerJason Liu <r64343@freescale.com>2012-07-20 13:38:41 +0800
commite2dfce71652b251a204bc98b4c6600fd6f90d467 (patch)
treee6ec089821b7a5b8d0dbeabab1e7b08df892299b /arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
parent43f001fd89948b1b6ed534d451353fe269ac3e80 (diff)
ENGR00213336 sabresd pfuze: support 1.2G by param which pass by u-boot
There is no fuse data for distinguish 1.2G or 1G, kernel need support passed param from u-boot that can know 1.2G or 1G. If 1.2G, will configure VDDSOC_IN &VDDARM_IN to 1.425V by pfuze and VDDSOC&VDDPU to 1.25V by internal ldo Signed-off-by: Robin Gong <B38343@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c')
-rw-r--r--arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
index ed6bfb115d31..2fc47e2a98b0 100644
--- a/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
+++ b/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
@@ -24,7 +24,11 @@
#include <linux/gpio.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/pfuze.h>
+#include <linux/io.h>
#include <mach/irqs.h>
+#include "crm_regs.h"
+#include "regs-anadig.h"
+#include "cpu_op-mx6.h"
/*
* Convenience conversion.
@@ -39,6 +43,10 @@
/* 7-bit I2C bus slave address */
#define PFUZE100_I2C_ADDR (0x08)
/*SWBST*/
+#define PFUZE100_SW1AVOL 32
+#define PFUZE100_SW1AVOL_VSEL_M (0x3f<<0)
+#define PFUZE100_SW1CVOL 46
+#define PFUZE100_SW1CVOL_VSEL_M (0x3f<<0)
#define PFUZE100_SW1ASTANDBY 33
#define PFUZE100_SW1ASTANDBY_STBY_VAL (0x18)
#define PFUZE100_SW1ASTANDBY_STBY_M (0x3f<<0)
@@ -64,6 +72,7 @@
#define PFUZE100_SWBSTCON1_SWBSTMOD_VAL (0x1<<2)
#define PFUZE100_SWBSTCON1_SWBSTMOD_M (0x3<<2)
+extern u32 arm_max_freq;
#ifdef CONFIG_MX6_INTER_LDO_BYPASS
static struct regulator_consumer_supply sw1_consumers[] = {
@@ -376,6 +385,29 @@ static struct regulator_init_data vgen6_init = {
static int pfuze100_init(struct mc_pfuze *pfuze)
{
int ret;
+ unsigned int reg;
+ if (arm_max_freq == CPU_AT_1_2GHz) {
+ /*VDDARM_IN 1.425V*/
+ ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1AVOL,
+ PFUZE100_SW1AVOL_VSEL_M,
+ 0x2d);
+ if (ret)
+ goto err;
+ /*VDDSOC_IN 1.425V*/
+ ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CVOL,
+ PFUZE100_SW1CVOL_VSEL_M,
+ 0x2d);
+ if (ret)
+ goto err;
+ /*set VDDSOC&VDDPU to 1.25V*/
+ reg = __raw_readl(ANADIG_REG_CORE);
+ reg &= ~BM_ANADIG_REG_CORE_REG2_TRG;
+ reg |= BF_ANADIG_REG_CORE_REG2_TRG(0x16);
+ reg &= ~BM_ANADIG_REG_CORE_REG1_TRG;
+ reg |= BF_ANADIG_REG_CORE_REG1_TRG(0x16);
+ __raw_writel(reg, ANADIG_REG_CORE);
+
+ }
ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ASTANDBY,
PFUZE100_SW1ASTANDBY_STBY_M,
PFUZE100_SW1ASTANDBY_STBY_VAL);