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author | Ryan QIAN <b32804@freescale.com> | 2012-02-13 09:38:16 +0800 |
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committer | Ryan QIAN <b32804@freescale.com> | 2012-02-13 10:18:37 +0800 |
commit | f0f308b93ec3e7984927b96d97ef3a384237791f (patch) | |
tree | 907ff4fc5e19b54e18632c6a8ef7e365ca7a6eae /arch/arm/mach-mx6 | |
parent | 0dc89c3d75b150f8e1286552d72f6c8d13245c7a (diff) |
ENGR00174295-02:[MX6]USDHC: ddr mode is masked on slots with no 1.8v support.
- check ocr_avail_sd & MMC_VDD_165_195 before set S18R bit to check whether
the host is support 1.8v support.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6')
0 files changed, 0 insertions, 0 deletions