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authorVishwanath BS <vishwanath.bs@ti.com>2010-02-24 12:05:57 -0700
committerPaul Walmsley <paul@pwsan.com>2010-02-24 12:05:57 -0700
commit5eb75f557843132da08938609def2774ee467d95 (patch)
treeb1d54dd71f6b6dc8ee548c0a44461de9d58690c2 /arch/arm/mach-omap2/dpll3xxx.c
parent0cc9314eaf82ecf9914ad2c845574ed5e63c0374 (diff)
OMAP3 clock: Remove FreqSel for 3630
DPLL_FREQSEL field in CLKEN_PLL register is no longer valid for OMAP3630. So remove references to that. Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> [paul@pwsan.com: added comment fix from Sergei Shtylyov] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/dpll3xxx.c')
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 2b559fc64855..68268cd89e05 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -243,8 +243,11 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel)
/* 3430 ES2 TRM: 4.7.6.9 DPLL Programming Sequence */
_omap3_noncore_dpll_bypass(clk);
- /* Set jitter correction */
- if (!cpu_is_omap44xx()) {
+ /*
+ * Set jitter correction. No jitter correction for OMAP4 and 3630
+ * since freqsel field is no longer present
+ */
+ if (!cpu_is_omap44xx() && !cpu_is_omap3630()) {
v = __raw_readl(dd->control_reg);
v &= ~dd->freqsel_mask;
v |= freqsel << __ffs(dd->freqsel_mask);
@@ -387,8 +390,8 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
if (dd->last_rounded_rate == 0)
return -EINVAL;
- /* No freqsel on OMAP4 */
- if (!cpu_is_omap44xx()) {
+ /* No freqsel on OMAP4 and OMAP3630 */
+ if (!cpu_is_omap44xx() && !cpu_is_omap3630()) {
freqsel = _omap3_dpll_compute_freqsel(clk,
dd->last_rounded_n);
if (!freqsel)