diff options
| author | Benoît Cousson <b-cousson@ti.com> | 2010-09-21 10:34:10 -0600 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2010-09-21 15:12:21 -0600 |
| commit | 0be1621a749907ada0101e4139a1f57168c5410b (patch) | |
| tree | 051f37298e6bc8b3b9256944c4c8e29322c01df3 /arch/arm/mach-omap2/prm.h | |
| parent | 16b040129e324598d13ff2e2b3469dc2e909ce12 (diff) | |
OMAP4: PRM: add module hard reset support
Most processor modules (e.g., DSP, IVA, IPU) on OMAPs can be reset
under the control of the PRM. This patch adds an API for this purpose
for OMAP4 devices:
int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);
int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);
int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);
This API is intended to be used only by the hwmod code - a subsequent
patch will add that support to hwmod.
This patch is a collaboration between Benoît Cousson <b-cousson@ti.com>
and Paul Walmsley <paul@pwsan.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm.h')
| -rw-r--r-- | arch/arm/mach-omap2/prm.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 588873b9303a..bc7e6e6099d5 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -5,7 +5,7 @@ * OMAP2/3 Power/Reset Management (PRM) register definitions * * Copyright (C) 2007-2009 Texas Instruments, Inc. - * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2010 Nokia Corporation * * Written by Paul Walmsley * @@ -246,6 +246,10 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) return prm_rmw_mod_reg_bits(bits, 0x0, module, idx); } +int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift); +int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift); +int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift); + #endif /* @@ -398,4 +402,11 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) #define OMAP_POWERSTATE_MASK (0x3 << 0) +/* + * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP + * submodule to exit hardreset + */ +#define MAX_MODULE_HARDRESET_WAIT 10000 + + #endif |