diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2013-03-19 12:19:01 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2013-03-25 12:29:40 +0100 |
| commit | 630be7ea2f2d0c2ee5662308297b77087da2ace2 (patch) | |
| tree | cebc679342ea8d1333f32216956e588550a0fddc /arch/arm/mach-prima2 | |
| parent | 60dbd7680f069c07525a825d805fd2644eae92e6 (diff) | |
ARM: sirf: enable sparse IRQ
Now that both irqchips for sirf are converted to not rely on
legacy domains, let's move all of the platform over to sparse
IRQ.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-prima2')
| -rw-r--r-- | arch/arm/mach-prima2/common.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-prima2/include/mach/irqs.h | 17 |
2 files changed, 2 insertions, 17 deletions
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c index 15c14dfb47a0..31f43eac1420 100644 --- a/arch/arm/mach-prima2/common.c +++ b/arch/arm/mach-prima2/common.c @@ -45,6 +45,7 @@ static const char *atlas6_dt_match[] __initdata = { DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)") /* Maintainer: Barry Song <baohua.song@csr.com> */ + .nr_irqs = 128, .map_io = sirfsoc_map_io, .init_irq = irqchip_init, .init_time = sirfsoc_prima2_timer_init, @@ -63,6 +64,7 @@ static const char *prima2_dt_match[] __initdata = { DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)") /* Maintainer: Barry Song <baohua.song@csr.com> */ + .nr_irqs = 128, .map_io = sirfsoc_map_io, .init_irq = irqchip_init, .init_time = sirfsoc_prima2_timer_init, diff --git a/arch/arm/mach-prima2/include/mach/irqs.h b/arch/arm/mach-prima2/include/mach/irqs.h deleted file mode 100644 index b778a0f248ed..000000000000 --- a/arch/arm/mach-prima2/include/mach/irqs.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-prima2/include/mach/irqs.h - * - * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. - * - * Licensed under GPLv2 or later. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#define SIRFSOC_INTENAL_IRQ_START 0 -#define SIRFSOC_INTENAL_IRQ_END 127 -#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1) -#define NR_IRQS 288 - -#endif |