summaryrefslogtreecommitdiff
path: root/arch/arm/mach-pxa/include
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2012-09-20 21:16:43 -0700
committerOlof Johansson <olof@lixom.net>2012-09-20 21:16:43 -0700
commitea832c41dacbc4a5f3888d9ef7c38213914aba2a (patch)
treebee97817d9a55f000e2bec5fa5d62d325050e6a6 /arch/arm/mach-pxa/include
parentb74aae9a2074e1caa2e40bf119f3a633f77c94e4 (diff)
parent84bae6c379e362aa017efd417199f51d5c2273ac (diff)
Merge branch 'next/dt' into next/multiplatform
* next/dt: (182 commits) ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support ARM: tegra: Add Avionic Design Medcom-Wide support ARM: tegra: Add Avionic Design Plutux support ARM: tegra: Add Avionic Design Tamonten support ARM: tegra: dts: Add pwm label ARM: dt: tegra: whistler: configure power off ARM: mxs: m28evk: Disable OCOTP OUI loading ARM: imx6q: use pll2_pfd2_396m as the enfc_sel's parent ARM: dts: imx6q-sabrelite: add usbotg pinctrl support ARM: dts: imx23-olinuxino: Add USB host support ARM: dts: imx6q-sabrelite: add usbmisc device ARM: dts: mx23: Add USB resources ARM: dts: mxs: Add ethernetX to macX aliases ARM: msm: Remove non-DT targets from 8960 ARM: msm: Add DT support for 8960 ARM: msm: Move io mapping prototypes to common.h ARM: msm: Rename board-msm8x60 to signify its DT only status ARM: msm: Make 8660 a DT only target ARM: msm: Move 8660 to DT timer ARM: msm: Add DT support to msm_timer ...
Diffstat (limited to 'arch/arm/mach-pxa/include')
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index 207ecb49a61b..f4d48d20754e 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -131,6 +131,7 @@
#define AICSR __REG(0x41340008) /* Application Subsystem Interrupt Control/Status Register */
#define CKENA __REG(0x4134000C) /* A Clock Enable Register */
#define CKENB __REG(0x41340010) /* B Clock Enable Register */
+#define CKENC __REG(0x41340024) /* C Clock Enable Register */
#define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */
#define ACCR_XPDIS (1 << 31) /* Core PLL Output Disable */