summaryrefslogtreecommitdiff
path: root/arch/arm/mach-pxa/mfp-pxa2xx.c
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2012-05-11 17:15:31 +0200
committerArnd Bergmann <arnd@arndb.de>2012-05-11 17:15:31 +0200
commit93c6d8927fa692faef3d7d945bd4fe84b0185ad4 (patch)
tree0a971c86114656ec4e39f7789d9faeb70432c36a /arch/arm/mach-pxa/mfp-pxa2xx.c
parentea01d31a07ae182028d2398380948f5a4ee09953 (diff)
parent50260924afd4b745bfb6e5f1caee381a1875fc31 (diff)
Merge branch 'clk/mxs' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/clock
Shawn Guo <shawn.guo@linaro.org> writes: mxs common clk porting for v3.5. It depends on the following two branches. [1] git://git.linaro.org/people/mturquette/linux.git clk-next [2] http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-arm.git clkdev As the mxs device tree conversion will constantly touch clock files, to save the conflicts, the updated mxs/dt branch coming later will based on this pull-request. * 'clk/mxs' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mxs: remove now unused timer_clk argument from mxs_timer_init ARM: mxs: remove old clock support ARM: mxs: switch to common clk framework ARM: mxs: change the lookup name for fec phy clock ARM: mxs: request clock for timer clk: mxs: add clock support for imx28 clk: mxs: add clock support for imx23 clk: mxs: add mxs specific clocks Includes an update to Linux 3.4-rc6 Conflicts: drivers/clk/Makefile Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-pxa/mfp-pxa2xx.c')
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c21
1 files changed, 19 insertions, 2 deletions
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index b0a842887780..ef0426a159d4 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -33,6 +33,8 @@
#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
+#define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
+#define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
#define PWER_WE35 (1 << 24)
@@ -348,6 +350,7 @@ static inline void pxa27x_mfp_init(void) {}
#ifdef CONFIG_PM
static unsigned long saved_gafr[2][4];
static unsigned long saved_gpdr[4];
+static unsigned long saved_gplr[4];
static unsigned long saved_pgsr[4];
static int pxa2xx_mfp_suspend(void)
@@ -366,14 +369,26 @@ static int pxa2xx_mfp_suspend(void)
}
for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
-
saved_gafr[0][i] = GAFR_L(i);
saved_gafr[1][i] = GAFR_U(i);
saved_gpdr[i] = GPDR(i * 32);
+ saved_gplr[i] = GPLR(i * 32);
saved_pgsr[i] = PGSR(i);
- GPDR(i * 32) = gpdr_lpm[i];
+ GPSR(i * 32) = PGSR(i);
+ GPCR(i * 32) = ~PGSR(i);
+ }
+
+ /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
+ for (i = 0; i < pxa_last_gpio; i++) {
+ if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
+ ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
+ (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
+ GPDR(i) |= GPIO_bit(i);
+ else
+ GPDR(i) &= ~GPIO_bit(i);
}
+
return 0;
}
@@ -384,6 +399,8 @@ static void pxa2xx_mfp_resume(void)
for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
GAFR_L(i) = saved_gafr[0][i];
GAFR_U(i) = saved_gafr[1][i];
+ GPSR(i * 32) = saved_gplr[i];
+ GPCR(i * 32) = ~saved_gplr[i];
GPDR(i * 32) = saved_gpdr[i];
PGSR(i) = saved_pgsr[i];
}