diff options
| author | Heiko Stuebner <heiko@sntech.de> | 2011-09-27 08:45:09 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-10-04 19:01:22 +0900 |
| commit | 4a43c666129f67b5bcc79fa59edb48c39fea75a0 (patch) | |
| tree | fbcd5239c8de0358cb5f41d4009412f5dc356bdb /arch/arm/mach-s3c2416 | |
| parent | bd95be618b2c7ee9066d82cb729c7fbbab102c93 (diff) | |
ARM: S3C2416: Add HSSPI clock sourced from EPLL
This clock is special to the S3C2416/2450 SoCs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c2416')
| -rw-r--r-- | arch/arm/mach-s3c2416/clock.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 21a5e81f0ab5..196fb37f4b19 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c @@ -38,6 +38,32 @@ static unsigned int armdiv[8] = { [7] = 8, }; +static struct clksrc_clk hsspi_eplldiv = { + .clk = { + .name = "hsspi-eplldiv", + .parent = &clk_esysclk.clk, + .ctrlbit = (1 << 14), + .enable = s3c2443_clkcon_enable_s, + }, + .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 24 }, +}; + +static struct clk *hsspi_sources[] = { + [0] = &hsspi_eplldiv.clk, + [1] = NULL, /* to fix */ +}; + +static struct clksrc_clk hsspi_mux = { + .clk = { + .name = "hsspi-if", + }, + .sources = &(struct clksrc_sources) { + .sources = hsspi_sources, + .nr_sources = ARRAY_SIZE(hsspi_sources), + }, + .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 18 }, +}; + static struct clksrc_clk hsmmc_div[] = { [0] = { .clk = { @@ -114,6 +140,8 @@ void __init_or_cpufreq s3c2416_setup_clocks(void) static struct clksrc_clk *clksrcs[] __initdata = { + &hsspi_eplldiv, + &hsspi_mux, &hsmmc_div[0], &hsmmc_div[1], &hsmmc_mux[0], |