diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2011-02-14 16:33:10 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-02-22 13:51:14 +0900 |
| commit | 7d30e8b3815f804139271dfc31962ab74ce89650 (patch) | |
| tree | 711d4830705e0147cb8184ca1a8e6e3c97bc02fe /arch/arm/mach-s5pv310 | |
| parent | f5412be599602124d2bdd49947b231dd77c0bf99 (diff) | |
ARM: EXYNOS4: Add EXYNOS4 CPU initialization support
This patch adds EXYNOS4 CPU support files in mach-exynos4,
and basically they are moved from mach-s5pv310 so that it
can support Samsung's new CPU name, EXYNOS4.
The EXYNOS4 ingegrates a ARM Cortex A9 multi-core.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv310')
27 files changed, 0 insertions, 2517 deletions
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c deleted file mode 100644 index 0db0fb65bd70..000000000000 --- a/arch/arm/mach-s5pv310/cpu.c +++ /dev/null @@ -1,202 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/cpu.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/sched.h> -#include <linux/sysdev.h> - -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/proc-fns.h> -#include <asm/hardware/cache-l2x0.h> - -#include <plat/cpu.h> -#include <plat/clock.h> -#include <plat/s5pv310.h> -#include <plat/sdhci.h> - -#include <mach/regs-irq.h> - -extern int combiner_init(unsigned int combiner_nr, void __iomem *base, - unsigned int irq_start); -extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); - -/* Initial IO mappings */ -static struct map_desc s5pv310_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_CMU, - .pfn = __phys_to_pfn(S5PV310_PA_CMU), - .length = SZ_128K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_PMU, - .pfn = __phys_to_pfn(S5PV310_PA_PMU), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_COMBINER_BASE, - .pfn = __phys_to_pfn(S5PV310_PA_COMBINER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_COREPERI_BASE, - .pfn = __phys_to_pfn(S5PV310_PA_COREPERI), - .length = SZ_8K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_L2CC, - .pfn = __phys_to_pfn(S5PV310_PA_L2CC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO1, - .pfn = __phys_to_pfn(S5PV310_PA_GPIO1), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO2, - .pfn = __phys_to_pfn(S5PV310_PA_GPIO2), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO3, - .pfn = __phys_to_pfn(S5PV310_PA_GPIO3), - .length = SZ_256, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC0, - .pfn = __phys_to_pfn(S5PV310_PA_DMC0), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(S3C_PA_UART), - .length = SZ_512K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(S5PV310_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static void s5pv310_idle(void) -{ - if (!need_resched()) - cpu_do_idle(); - - local_irq_enable(); -} - -/* s5pv310_map_io - * - * register the standard cpu IO areas -*/ -void __init s5pv310_map_io(void) -{ - iotable_init(s5pv310_iodesc, ARRAY_SIZE(s5pv310_iodesc)); - - /* initialize device information early */ - s5pv310_default_sdhci0(); - s5pv310_default_sdhci1(); - s5pv310_default_sdhci2(); - s5pv310_default_sdhci3(); -} - -void __init s5pv310_init_clocks(int xtal) -{ - printk(KERN_DEBUG "%s: initializing clocks\n", __func__); - - s3c24xx_register_baseclocks(xtal); - s5p_register_clocks(xtal); - s5pv310_register_clocks(); - s5pv310_setup_clocks(); -} - -void __init s5pv310_init_irq(void) -{ - int irq; - - gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); - - for (irq = 0; irq < MAX_COMBINER_NR; irq++) { - - /* - * From SPI(0) to SPI(39) and SPI(51), SPI(53) are - * connected to the interrupt combiner. These irqs - * should be initialized to support cascade interrupt. - */ - if ((irq >= 40) && !(irq == 51) && !(irq == 53)) - continue; - - combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), - COMBINER_IRQ(irq, 0)); - combiner_cascade_irq(irq, IRQ_SPI(irq)); - } - - /* The parameters of s5p_init_irq() are for VIC init. - * Theses parameters should be NULL and 0 because S5PV310 - * uses GIC instead of VIC. - */ - s5p_init_irq(NULL, 0); -} - -struct sysdev_class s5pv310_sysclass = { - .name = "s5pv310-core", -}; - -static struct sys_device s5pv310_sysdev = { - .cls = &s5pv310_sysclass, -}; - -static int __init s5pv310_core_init(void) -{ - return sysdev_class_register(&s5pv310_sysclass); -} - -core_initcall(s5pv310_core_init); - -#ifdef CONFIG_CACHE_L2X0 -static int __init s5pv310_l2x0_cache_init(void) -{ - /* TAG, Data Latency Control: 2cycle */ - __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); - __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); - - /* L2X0 Prefetch Control */ - __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); - - /* L2X0 Power Control */ - __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, - S5P_VA_L2CC + L2X0_POWER_CTRL); - - l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); - - return 0; -} - -early_initcall(s5pv310_l2x0_cache_init); -#endif - -int __init s5pv310_init(void) -{ - printk(KERN_INFO "S5PV310: Initializing architecture\n"); - - /* set idle function */ - pm_idle = s5pv310_idle; - - return sysdev_register(&s5pv310_sysdev); -} diff --git a/arch/arm/mach-s5pv310/cpufreq.c b/arch/arm/mach-s5pv310/cpufreq.c deleted file mode 100644 index b04cbc731128..000000000000 --- a/arch/arm/mach-s5pv310/cpufreq.c +++ /dev/null @@ -1,580 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/cpufreq.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV310 - CPU frequency scaling support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/regulator/consumer.h> -#include <linux/cpufreq.h> - -#include <mach/map.h> -#include <mach/regs-clock.h> -#include <mach/regs-mem.h> - -#include <plat/clock.h> -#include <plat/pm.h> - -static struct clk *cpu_clk; -static struct clk *moutcore; -static struct clk *mout_mpll; -static struct clk *mout_apll; - -#ifdef CONFIG_REGULATOR -static struct regulator *arm_regulator; -static struct regulator *int_regulator; -#endif - -static struct cpufreq_freqs freqs; -static unsigned int memtype; - -enum s5pv310_memory_type { - DDR2 = 4, - LPDDR2, - DDR3, -}; - -enum cpufreq_level_index { - L0, L1, L2, L3, CPUFREQ_LEVEL_END, -}; - -static struct cpufreq_frequency_table s5pv310_freq_table[] = { - {L0, 1000*1000}, - {L1, 800*1000}, - {L2, 400*1000}, - {L3, 100*1000}, - {0, CPUFREQ_TABLE_END}, -}; - -static unsigned int clkdiv_cpu0[CPUFREQ_LEVEL_END][7] = { - /* - * Clock divider value for following - * { DIVCORE, DIVCOREM0, DIVCOREM1, DIVPERIPH, - * DIVATB, DIVPCLK_DBG, DIVAPLL } - */ - - /* ARM L0: 1000MHz */ - { 0, 3, 7, 3, 3, 0, 1 }, - - /* ARM L1: 800MHz */ - { 0, 3, 7, 3, 3, 0, 1 }, - - /* ARM L2: 400MHz */ - { 0, 1, 3, 1, 3, 0, 1 }, - - /* ARM L3: 100MHz */ - { 0, 0, 1, 0, 3, 1, 1 }, -}; - -static unsigned int clkdiv_cpu1[CPUFREQ_LEVEL_END][2] = { - /* - * Clock divider value for following - * { DIVCOPY, DIVHPM } - */ - - /* ARM L0: 1000MHz */ - { 3, 0 }, - - /* ARM L1: 800MHz */ - { 3, 0 }, - - /* ARM L2: 400MHz */ - { 3, 0 }, - - /* ARM L3: 100MHz */ - { 3, 0 }, -}; - -static unsigned int clkdiv_dmc0[CPUFREQ_LEVEL_END][8] = { - /* - * Clock divider value for following - * { DIVACP, DIVACP_PCLK, DIVDPHY, DIVDMC, DIVDMCD - * DIVDMCP, DIVCOPY2, DIVCORE_TIMERS } - */ - - /* DMC L0: 400MHz */ - { 3, 1, 1, 1, 1, 1, 3, 1 }, - - /* DMC L1: 400MHz */ - { 3, 1, 1, 1, 1, 1, 3, 1 }, - - /* DMC L2: 266.7MHz */ - { 7, 1, 1, 2, 1, 1, 3, 1 }, - - /* DMC L3: 200MHz */ - { 7, 1, 1, 3, 1, 1, 3, 1 }, -}; - -static unsigned int clkdiv_top[CPUFREQ_LEVEL_END][5] = { - /* - * Clock divider value for following - * { DIVACLK200, DIVACLK100, DIVACLK160, DIVACLK133, DIVONENAND } - */ - - /* ACLK200 L0: 200MHz */ - { 3, 7, 4, 5, 1 }, - - /* ACLK200 L1: 200MHz */ - { 3, 7, 4, 5, 1 }, - - /* ACLK200 L2: 160MHz */ - { 4, 7, 5, 7, 1 }, - - /* ACLK200 L3: 133.3MHz */ - { 5, 7, 7, 7, 1 }, -}; - -static unsigned int clkdiv_lr_bus[CPUFREQ_LEVEL_END][2] = { - /* - * Clock divider value for following - * { DIVGDL/R, DIVGPL/R } - */ - - /* ACLK_GDL/R L0: 200MHz */ - { 3, 1 }, - - /* ACLK_GDL/R L1: 200MHz */ - { 3, 1 }, - - /* ACLK_GDL/R L2: 160MHz */ - { 4, 1 }, - - /* ACLK_GDL/R L3: 133.3MHz */ - { 5, 1 }, -}; - -struct cpufreq_voltage_table { - unsigned int index; /* any */ - unsigned int arm_volt; /* uV */ - unsigned int int_volt; -}; - -static struct cpufreq_voltage_table s5pv310_volt_table[CPUFREQ_LEVEL_END] = { - { - .index = L0, - .arm_volt = 1200000, - .int_volt = 1100000, - }, { - .index = L1, - .arm_volt = 1100000, - .int_volt = 1100000, - }, { - .index = L2, - .arm_volt = 1000000, - .int_volt = 1000000, - }, { - .index = L3, - .arm_volt = 900000, - .int_volt = 1000000, - }, -}; - -static unsigned int s5pv310_apll_pms_table[CPUFREQ_LEVEL_END] = { - /* APLL FOUT L0: 1000MHz */ - ((250 << 16) | (6 << 8) | 1), - - /* APLL FOUT L1: 800MHz */ - ((200 << 16) | (6 << 8) | 1), - - /* APLL FOUT L2 : 400MHz */ - ((200 << 16) | (6 << 8) | 2), - - /* APLL FOUT L3: 100MHz */ - ((200 << 16) | (6 << 8) | 4), -}; - -int s5pv310_verify_speed(struct cpufreq_policy *policy) -{ - return cpufreq_frequency_table_verify(policy, s5pv310_freq_table); -} - -unsigned int s5pv310_getspeed(unsigned int cpu) -{ - return clk_get_rate(cpu_clk) / 1000; -} - -void s5pv310_set_clkdiv(unsigned int div_index) -{ - unsigned int tmp; - - /* Change Divider - CPU0 */ - - tmp = __raw_readl(S5P_CLKDIV_CPU); - - tmp &= ~(S5P_CLKDIV_CPU0_CORE_MASK | S5P_CLKDIV_CPU0_COREM0_MASK | - S5P_CLKDIV_CPU0_COREM1_MASK | S5P_CLKDIV_CPU0_PERIPH_MASK | - S5P_CLKDIV_CPU0_ATB_MASK | S5P_CLKDIV_CPU0_PCLKDBG_MASK | - S5P_CLKDIV_CPU0_APLL_MASK); - - tmp |= ((clkdiv_cpu0[div_index][0] << S5P_CLKDIV_CPU0_CORE_SHIFT) | - (clkdiv_cpu0[div_index][1] << S5P_CLKDIV_CPU0_COREM0_SHIFT) | - (clkdiv_cpu0[div_index][2] << S5P_CLKDIV_CPU0_COREM1_SHIFT) | - (clkdiv_cpu0[div_index][3] << S5P_CLKDIV_CPU0_PERIPH_SHIFT) | - (clkdiv_cpu0[div_index][4] << S5P_CLKDIV_CPU0_ATB_SHIFT) | - (clkdiv_cpu0[div_index][5] << S5P_CLKDIV_CPU0_PCLKDBG_SHIFT) | - (clkdiv_cpu0[div_index][6] << S5P_CLKDIV_CPU0_APLL_SHIFT)); - - __raw_writel(tmp, S5P_CLKDIV_CPU); - - do { - tmp = __raw_readl(S5P_CLKDIV_STATCPU); - } while (tmp & 0x1111111); - - /* Change Divider - CPU1 */ - - tmp = __raw_readl(S5P_CLKDIV_CPU1); - - tmp &= ~((0x7 << 4) | 0x7); - - tmp |= ((clkdiv_cpu1[div_index][0] << 4) | - (clkdiv_cpu1[div_index][1] << 0)); - - __raw_writel(tmp, S5P_CLKDIV_CPU1); - - do { - tmp = __raw_readl(S5P_CLKDIV_STATCPU1); - } while (tmp & 0x11); - - /* Change Divider - DMC0 */ - - tmp = __raw_readl(S5P_CLKDIV_DMC0); - - tmp &= ~(S5P_CLKDIV_DMC0_ACP_MASK | S5P_CLKDIV_DMC0_ACPPCLK_MASK | - S5P_CLKDIV_DMC0_DPHY_MASK | S5P_CLKDIV_DMC0_DMC_MASK | - S5P_CLKDIV_DMC0_DMCD_MASK | S5P_CLKDIV_DMC0_DMCP_MASK | - S5P_CLKDIV_DMC0_COPY2_MASK | S5P_CLKDIV_DMC0_CORETI_MASK); - - tmp |= ((clkdiv_dmc0[div_index][0] << S5P_CLKDIV_DMC0_ACP_SHIFT) | - (clkdiv_dmc0[div_index][1] << S5P_CLKDIV_DMC0_ACPPCLK_SHIFT) | - (clkdiv_dmc0[div_index][2] << S5P_CLKDIV_DMC0_DPHY_SHIFT) | - (clkdiv_dmc0[div_index][3] << S5P_CLKDIV_DMC0_DMC_SHIFT) | - (clkdiv_dmc0[div_index][4] << S5P_CLKDIV_DMC0_DMCD_SHIFT) | - (clkdiv_dmc0[div_index][5] << S5P_CLKDIV_DMC0_DMCP_SHIFT) | - (clkdiv_dmc0[div_index][6] << S5P_CLKDIV_DMC0_COPY2_SHIFT) | - (clkdiv_dmc0[div_index][7] << S5P_CLKDIV_DMC0_CORETI_SHIFT)); - - __raw_writel(tmp, S5P_CLKDIV_DMC0); - - do { - tmp = __raw_readl(S5P_CLKDIV_STAT_DMC0); - } while (tmp & 0x11111111); - - /* Change Divider - TOP */ - - tmp = __raw_readl(S5P_CLKDIV_TOP); - - tmp &= ~(S5P_CLKDIV_TOP_ACLK200_MASK | S5P_CLKDIV_TOP_ACLK100_MASK | - S5P_CLKDIV_TOP_ACLK160_MASK | S5P_CLKDIV_TOP_ACLK133_MASK | - S5P_CLKDIV_TOP_ONENAND_MASK); - - tmp |= ((clkdiv_top[div_index][0] << S5P_CLKDIV_TOP_ACLK200_SHIFT) | - (clkdiv_top[div_index][1] << S5P_CLKDIV_TOP_ACLK100_SHIFT) | - (clkdiv_top[div_index][2] << S5P_CLKDIV_TOP_ACLK160_SHIFT) | - (clkdiv_top[div_index][3] << S5P_CLKDIV_TOP_ACLK133_SHIFT) | - (clkdiv_top[div_index][4] << S5P_CLKDIV_TOP_ONENAND_SHIFT)); - - __raw_writel(tmp, S5P_CLKDIV_TOP); - - do { - tmp = __raw_readl(S5P_CLKDIV_STAT_TOP); - } while (tmp & 0x11111); - - /* Change Divider - LEFTBUS */ - - tmp = __raw_readl(S5P_CLKDIV_LEFTBUS); - - tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK); - - tmp |= ((clkdiv_lr_bus[div_index][0] << S5P_CLKDIV_BUS_GDLR_SHIFT) | - (clkdiv_lr_bus[div_index][1] << S5P_CLKDIV_BUS_GPLR_SHIFT)); - - __raw_writel(tmp, S5P_CLKDIV_LEFTBUS); - - do { - tmp = __raw_readl(S5P_CLKDIV_STAT_LEFTBUS); - } while (tmp & 0x11); - - /* Change Divider - RIGHTBUS */ - - tmp = __raw_readl(S5P_CLKDIV_RIGHTBUS); - - tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK); - - tmp |= ((clkdiv_lr_bus[div_index][0] << S5P_CLKDIV_BUS_GDLR_SHIFT) | - (clkdiv_lr_bus[div_index][1] << S5P_CLKDIV_BUS_GPLR_SHIFT)); - - __raw_writel(tmp, S5P_CLKDIV_RIGHTBUS); - - do { - tmp = __raw_readl(S5P_CLKDIV_STAT_RIGHTBUS); - } while (tmp & 0x11); -} - -static void s5pv310_set_apll(unsigned int index) -{ - unsigned int tmp; - - /* 1. MUX_CORE_SEL = MPLL, ARMCLK uses MPLL for lock time */ - clk_set_parent(moutcore, mout_mpll); - - do { - tmp = (__raw_readl(S5P_CLKMUX_STATCPU) - >> S5P_CLKSRC_CPU_MUXCORE_SHIFT); - tmp &= 0x7; - } while (tmp != 0x2); - - /* 2. Set APLL Lock time */ - __raw_writel(S5P_APLL_LOCKTIME, S5P_APLL_LOCK); - - /* 3. Change PLL PMS values */ - tmp = __raw_readl(S5P_APLL_CON0); - tmp &= ~((0x3ff << 16) | (0x3f << 8) | (0x7 << 0)); - tmp |= s5pv310_apll_pms_table[index]; - __raw_writel(tmp, S5P_APLL_CON0); - - /* 4. wait_lock_time */ - do { - tmp = __raw_readl(S5P_APLL_CON0); - } while (!(tmp & (0x1 << S5P_APLLCON0_LOCKED_SHIFT))); - - /* 5. MUX_CORE_SEL = APLL */ - clk_set_parent(moutcore, mout_apll); - - do { - tmp = __raw_readl(S5P_CLKMUX_STATCPU); - tmp &= S5P_CLKMUX_STATCPU_MUXCORE_MASK; - } while (tmp != (0x1 << S5P_CLKSRC_CPU_MUXCORE_SHIFT)); -} - -static void s5pv310_set_frequency(unsigned int old_index, unsigned int new_index) -{ - unsigned int tmp; - - if (old_index > new_index) { - /* The frequency changing to L0 needs to change apll */ - if (freqs.new == s5pv310_freq_table[L0].frequency) { - /* 1. Change the system clock divider values */ - s5pv310_set_clkdiv(new_index); - - /* 2. Change the apll m,p,s value */ - s5pv310_set_apll(new_index); - } else { - /* 1. Change the system clock divider values */ - s5pv310_set_clkdiv(new_index); - - /* 2. Change just s value in apll m,p,s value */ - tmp = __raw_readl(S5P_APLL_CON0); - tmp &= ~(0x7 << 0); - tmp |= (s5pv310_apll_pms_table[new_index] & 0x7); - __raw_writel(tmp, S5P_APLL_CON0); - } - } - - else if (old_index < new_index) { - /* The frequency changing from L0 needs to change apll */ - if (freqs.old == s5pv310_freq_table[L0].frequency) { - /* 1. Change the apll m,p,s value */ - s5pv310_set_apll(new_index); - - /* 2. Change the system clock divider values */ - s5pv310_set_clkdiv(new_index); - } else { - /* 1. Change just s value in apll m,p,s value */ - tmp = __raw_readl(S5P_APLL_CON0); - tmp &= ~(0x7 << 0); - tmp |= (s5pv310_apll_pms_table[new_index] & 0x7); - __raw_writel(tmp, S5P_APLL_CON0); - - /* 2. Change the system clock divider values */ - s5pv310_set_clkdiv(new_index); - } - } -} - -static int s5pv310_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) -{ - unsigned int index, old_index; - unsigned int arm_volt, int_volt; - - freqs.old = s5pv310_getspeed(policy->cpu); - - if (cpufreq_frequency_table_target(policy, s5pv310_freq_table, - freqs.old, relation, &old_index)) - return -EINVAL; - - if (cpufreq_frequency_table_target(policy, s5pv310_freq_table, - target_freq, relation, &index)) - return -EINVAL; - - freqs.new = s5pv310_freq_table[index].frequency; - freqs.cpu = policy->cpu; - - if (freqs.new == freqs.old) - return 0; - - /* get the voltage value */ - arm_volt = s5pv310_volt_table[index].arm_volt; - int_volt = s5pv310_volt_table[index].int_volt; - - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); - - /* control regulator */ - if (freqs.new > freqs.old) { - /* Voltage up */ -#ifdef CONFIG_REGULATOR - regulator_set_voltage(arm_regulator, arm_volt, arm_volt); - regulator_set_voltage(int_regulator, int_volt, int_volt); -#endif - } - - /* Clock Configuration Procedure */ - s5pv310_set_frequency(old_index, index); - - /* control regulator */ - if (freqs.new < freqs.old) { - /* Voltage down */ -#ifdef CONFIG_REGULATOR - regulator_set_voltage(arm_regulator, arm_volt, arm_volt); - regulator_set_voltage(int_regulator, int_volt, int_volt); -#endif - } - - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); - - return 0; -} - -#ifdef CONFIG_PM -static int s5pv310_cpufreq_suspend(struct cpufreq_policy *policy, - pm_message_t pmsg) -{ - return 0; -} - -static int s5pv310_cpufreq_resume(struct cpufreq_policy *policy) -{ - return 0; -} -#endif - -static int s5pv310_cpufreq_cpu_init(struct cpufreq_policy *policy) -{ - policy->cur = policy->min = policy->max = s5pv310_getspeed(policy->cpu); - - cpufreq_frequency_table_get_attr(s5pv310_freq_table, policy->cpu); - - /* set the transition latency value */ - policy->cpuinfo.transition_latency = 100000; - - /* - * S5PV310 multi-core processors has 2 cores - * that the frequency cannot be set independently. - * Each cpu is bound to the same speed. - * So the affected cpu is all of the cpus. - */ - cpumask_setall(policy->cpus); - - return cpufreq_frequency_table_cpuinfo(policy, s5pv310_freq_table); -} - -static struct cpufreq_driver s5pv310_driver = { - .flags = CPUFREQ_STICKY, - .verify = s5pv310_verify_speed, - .target = s5pv310_target, - .get = s5pv310_getspeed, - .init = s5pv310_cpufreq_cpu_init, - .name = "s5pv310_cpufreq", -#ifdef CONFIG_PM - .suspend = s5pv310_cpufreq_suspend, - .resume = s5pv310_cpufreq_resume, -#endif -}; - -static int __init s5pv310_cpufreq_init(void) -{ - cpu_clk = clk_get(NULL, "armclk"); - if (IS_ERR(cpu_clk)) - return PTR_ERR(cpu_clk); - - moutcore = clk_get(NULL, "moutcore"); - if (IS_ERR(moutcore)) - goto out; - - mout_mpll = clk_get(NULL, "mout_mpll"); - if (IS_ERR(mout_mpll)) - goto out; - - mout_apll = clk_get(NULL, "mout_apll"); - if (IS_ERR(mout_apll)) - goto out; - -#ifdef CONFIG_REGULATOR - arm_regulator = regulator_get(NULL, "vdd_arm"); - if (IS_ERR(arm_regulator)) { - printk(KERN_ERR "failed to get resource %s\n", "vdd_arm"); - goto out; - } - - int_regulator = regulator_get(NULL, "vdd_int"); - if (IS_ERR(int_regulator)) { - printk(KERN_ERR "failed to get resource %s\n", "vdd_int"); - goto out; - } -#endif - - /* - * Check DRAM type. - * Because DVFS level is different according to DRAM type. - */ - memtype = __raw_readl(S5P_VA_DMC0 + S5P_DMC0_MEMCON_OFFSET); - memtype = (memtype >> S5P_DMC0_MEMTYPE_SHIFT); - memtype &= S5P_DMC0_MEMTYPE_MASK; - - if ((memtype < DDR2) && (memtype > DDR3)) { - printk(KERN_ERR "%s: wrong memtype= 0x%x\n", __func__, memtype); - goto out; - } else { - printk(KERN_DEBUG "%s: memtype= 0x%x\n", __func__, memtype); - } - - return cpufreq_register_driver(&s5pv310_driver); - -out: - if (!IS_ERR(cpu_clk)) - clk_put(cpu_clk); - - if (!IS_ERR(moutcore)) - clk_put(moutcore); - - if (!IS_ERR(mout_mpll)) - clk_put(mout_mpll); - - if (!IS_ERR(mout_apll)) - clk_put(mout_apll); - -#ifdef CONFIG_REGULATOR - if (!IS_ERR(arm_regulator)) - regulator_put(arm_regulator); - - if (!IS_ERR(int_regulator)) - regulator_put(int_regulator); -#endif - - printk(KERN_ERR "%s: failed initialization\n", __func__); - - return -EINVAL; -} -late_initcall(s5pv310_cpufreq_init); diff --git a/arch/arm/mach-s5pv310/dma.c b/arch/arm/mach-s5pv310/dma.c deleted file mode 100644 index 20066c7c9e56..000000000000 --- a/arch/arm/mach-s5pv310/dma.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> - -#include <plat/devs.h> -#include <plat/irqs.h> - -#include <mach/map.h> -#include <mach/irqs.h> - -#include <plat/s3c-pl330-pdata.h> - -static u64 dma_dmamask = DMA_BIT_MASK(32); - -static struct resource s5pv310_pdma0_resource[] = { - [0] = { - .start = S5PV310_PA_PDMA0, - .end = S5PV310_PA_PDMA0 + SZ_4K, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PDMA0, - .end = IRQ_PDMA0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct s3c_pl330_platdata s5pv310_pdma0_pdata = { - .peri = { - [0] = DMACH_PCM0_RX, - [1] = DMACH_PCM0_TX, - [2] = DMACH_PCM2_RX, - [3] = DMACH_PCM2_TX, - [4] = DMACH_MSM_REQ0, - [5] = DMACH_MSM_REQ2, - [6] = DMACH_SPI0_RX, - [7] = DMACH_SPI0_TX, - [8] = DMACH_SPI2_RX, - [9] = DMACH_SPI2_TX, - [10] = DMACH_I2S0S_TX, - [11] = DMACH_I2S0_RX, - [12] = DMACH_I2S0_TX, - [13] = DMACH_I2S2_RX, - [14] = DMACH_I2S2_TX, - [15] = DMACH_UART0_RX, - [16] = DMACH_UART0_TX, - [17] = DMACH_UART2_RX, - [18] = DMACH_UART2_TX, - [19] = DMACH_UART4_RX, - [20] = DMACH_UART4_TX, - [21] = DMACH_SLIMBUS0_RX, - [22] = DMACH_SLIMBUS0_TX, - [23] = DMACH_SLIMBUS2_RX, - [24] = DMACH_SLIMBUS2_TX, - [25] = DMACH_SLIMBUS4_RX, - [26] = DMACH_SLIMBUS4_TX, - [27] = DMACH_AC97_MICIN, - [28] = DMACH_AC97_PCMIN, - [29] = DMACH_AC97_PCMOUT, - [30] = DMACH_MAX, - [31] = DMACH_MAX, - }, -}; - -static struct platform_device s5pv310_device_pdma0 = { - .name = "s3c-pl330", - .id = 0, - .num_resources = ARRAY_SIZE(s5pv310_pdma0_resource), - .resource = s5pv310_pdma0_resource, - .dev = { - .dma_mask = &dma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s5pv310_pdma0_pdata, - }, -}; - -static struct resource s5pv310_pdma1_resource[] = { - [0] = { - .start = S5PV310_PA_PDMA1, - .end = S5PV310_PA_PDMA1 + SZ_4K, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PDMA1, - .end = IRQ_PDMA1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct s3c_pl330_platdata s5pv310_pdma1_pdata = { - .peri = { - [0] = DMACH_PCM0_RX, - [1] = DMACH_PCM0_TX, - [2] = DMACH_PCM1_RX, - [3] = DMACH_PCM1_TX, - [4] = DMACH_MSM_REQ1, - [5] = DMACH_MSM_REQ3, - [6] = DMACH_SPI1_RX, - [7] = DMACH_SPI1_TX, - [8] = DMACH_I2S0S_TX, - [9] = DMACH_I2S0_RX, - [10] = DMACH_I2S0_TX, - [11] = DMACH_I2S1_RX, - [12] = DMACH_I2S1_TX, - [13] = DMACH_UART0_RX, - [14] = DMACH_UART0_TX, - [15] = DMACH_UART1_RX, - [16] = DMACH_UART1_TX, - [17] = DMACH_UART3_RX, - [18] = DMACH_UART3_TX, - [19] = DMACH_SLIMBUS1_RX, - [20] = DMACH_SLIMBUS1_TX, - [21] = DMACH_SLIMBUS3_RX, - [22] = DMACH_SLIMBUS3_TX, - [23] = DMACH_SLIMBUS5_RX, - [24] = DMACH_SLIMBUS5_TX, - [25] = DMACH_SLIMBUS0AUX_RX, - [26] = DMACH_SLIMBUS0AUX_TX, - [27] = DMACH_SPDIF, - [28] = DMACH_MAX, - [29] = DMACH_MAX, - [30] = DMACH_MAX, - [31] = DMACH_MAX, - }, -}; - -static struct platform_device s5pv310_device_pdma1 = { - .name = "s3c-pl330", - .id = 1, - .num_resources = ARRAY_SIZE(s5pv310_pdma1_resource), - .resource = s5pv310_pdma1_resource, - .dev = { - .dma_mask = &dma_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s5pv310_pdma1_pdata, - }, -}; - -static struct platform_device *s5pv310_dmacs[] __initdata = { - &s5pv310_device_pdma0, - &s5pv310_device_pdma1, -}; - -static int __init s5pv310_dma_init(void) -{ - platform_add_devices(s5pv310_dmacs, ARRAY_SIZE(s5pv310_dmacs)); - - return 0; -} -arch_initcall(s5pv310_dma_init); diff --git a/arch/arm/mach-s5pv310/gpiolib.c b/arch/arm/mach-s5pv310/gpiolib.c deleted file mode 100644 index 55217b8923ec..000000000000 --- a/arch/arm/mach-s5pv310/gpiolib.c +++ /dev/null @@ -1,304 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/gpiolib.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV310 - GPIOlib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/gpio.h> - -#include <mach/map.h> - -#include <plat/gpio-core.h> -#include <plat/gpio-cfg.h> -#include <plat/gpio-cfg-helpers.h> - -static struct s3c_gpio_cfg gpio_cfg = { - .set_config = s3c_gpio_setcfg_s3c64xx_4bit, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -static struct s3c_gpio_cfg gpio_cfg_noint = { - .set_config = s3c_gpio_setcfg_s3c64xx_4bit, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -/* - * Following are the gpio banks in v310. - * - * The 'config' member when left to NULL, is initialized to the default - * structure gpio_cfg in the init function below. - * - * The 'base' member is also initialized in the init function below. - * Note: The initialization of 'base' member of s3c_gpio_chip structure - * uses the above macro and depends on the banks being listed in order here. - */ -static struct s3c_gpio_chip s5pv310_gpio_part1_4bit[] = { - { - .chip = { - .base = S5PV310_GPA0(0), - .ngpio = S5PV310_GPIO_A0_NR, - .label = "GPA0", - }, - }, { - .chip = { - .base = S5PV310_GPA1(0), - .ngpio = S5PV310_GPIO_A1_NR, - .label = "GPA1", - }, - }, { - .chip = { - .base = S5PV310_GPB(0), - .ngpio = S5PV310_GPIO_B_NR, - .label = "GPB", - }, - }, { - .chip = { - .base = S5PV310_GPC0(0), - .ngpio = S5PV310_GPIO_C0_NR, - .label = "GPC0", - }, - }, { - .chip = { - .base = S5PV310_GPC1(0), - .ngpio = S5PV310_GPIO_C1_NR, - .label = "GPC1", - }, - }, { - .chip = { - .base = S5PV310_GPD0(0), - .ngpio = S5PV310_GPIO_D0_NR, - .label = "GPD0", - }, - }, { - .chip = { - .base = S5PV310_GPD1(0), - .ngpio = S5PV310_GPIO_D1_NR, - .label = "GPD1", - }, - }, { - .chip = { - .base = S5PV310_GPE0(0), - .ngpio = S5PV310_GPIO_E0_NR, - .label = "GPE0", - }, - }, { - .chip = { - .base = S5PV310_GPE1(0), - .ngpio = S5PV310_GPIO_E1_NR, - .label = "GPE1", - }, - }, { - .chip = { - .base = S5PV310_GPE2(0), - .ngpio = S5PV310_GPIO_E2_NR, - .label = "GPE2", - }, - }, { - .chip = { - .base = S5PV310_GPE3(0), - .ngpio = S5PV310_GPIO_E3_NR, - .label = "GPE3", - }, - }, { - .chip = { - .base = S5PV310_GPE4(0), - .ngpio = S5PV310_GPIO_E4_NR, - .label = "GPE4", - }, - }, { - .chip = { - .base = S5PV310_GPF0(0), - .ngpio = S5PV310_GPIO_F0_NR, - .label = "GPF0", - }, - }, { - .chip = { - .base = S5PV310_GPF1(0), - .ngpio = S5PV310_GPIO_F1_NR, - .label = "GPF1", - }, - }, { - .chip = { - .base = S5PV310_GPF2(0), - .ngpio = S5PV310_GPIO_F2_NR, - .label = "GPF2", - }, - }, { - .chip = { - .base = S5PV310_GPF3(0), - .ngpio = S5PV310_GPIO_F3_NR, - .label = "GPF3", - }, - }, -}; - -static struct s3c_gpio_chip s5pv310_gpio_part2_4bit[] = { - { - .chip = { - .base = S5PV310_GPJ0(0), - .ngpio = S5PV310_GPIO_J0_NR, - .label = "GPJ0", - }, - }, { - .chip = { - .base = S5PV310_GPJ1(0), - .ngpio = S5PV310_GPIO_J1_NR, - .label = "GPJ1", - }, - }, { - .chip = { - .base = S5PV310_GPK0(0), - .ngpio = S5PV310_GPIO_K0_NR, - .label = "GPK0", - }, - }, { - .chip = { - .base = S5PV310_GPK1(0), - .ngpio = S5PV310_GPIO_K1_NR, - .label = "GPK1", - }, - }, { - .chip = { - .base = S5PV310_GPK2(0), - .ngpio = S5PV310_GPIO_K2_NR, - .label = "GPK2", - }, - }, { - .chip = { - .base = S5PV310_GPK3(0), - .ngpio = S5PV310_GPIO_K3_NR, - .label = "GPK3", - }, - }, { - .chip = { - .base = S5PV310_GPL0(0), - .ngpio = S5PV310_GPIO_L0_NR, - .label = "GPL0", - }, - }, { - .chip = { - .base = S5PV310_GPL1(0), - .ngpio = S5PV310_GPIO_L1_NR, - .label = "GPL1", - }, - }, { - .chip = { - .base = S5PV310_GPL2(0), - .ngpio = S5PV310_GPIO_L2_NR, - .label = "GPL2", - }, - }, { - .base = (S5P_VA_GPIO2 + 0xC00), - .config = &gpio_cfg_noint, - .irq_base = IRQ_EINT(0), - .chip = { - .base = S5PV310_GPX0(0), - .ngpio = S5PV310_GPIO_X0_NR, - .label = "GPX0", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = (S5P_VA_GPIO2 + 0xC20), - .config = &gpio_cfg_noint, - .irq_base = IRQ_EINT(8), - .chip = { - .base = S5PV310_GPX1(0), - .ngpio = S5PV310_GPIO_X1_NR, - .label = "GPX1", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = (S5P_VA_GPIO2 + 0xC40), - .config = &gpio_cfg_noint, - .irq_base = IRQ_EINT(16), - .chip = { - .base = S5PV310_GPX2(0), - .ngpio = S5PV310_GPIO_X2_NR, - .label = "GPX2", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = (S5P_VA_GPIO2 + 0xC60), - .config = &gpio_cfg_noint, - .irq_base = IRQ_EINT(24), - .chip = { - .base = S5PV310_GPX3(0), - .ngpio = S5PV310_GPIO_X3_NR, - .label = "GPX3", - .to_irq = samsung_gpiolib_to_irq, - }, - }, -}; - -static struct s3c_gpio_chip s5pv310_gpio_part3_4bit[] = { - { - .chip = { - .base = S5PV310_GPZ(0), - .ngpio = S5PV310_GPIO_Z_NR, - .label = "GPZ", - }, - }, -}; - -static __init int s5pv310_gpiolib_init(void) -{ - struct s3c_gpio_chip *chip; - int i; - int nr_chips; - - /* GPIO part 1 */ - - chip = s5pv310_gpio_part1_4bit; - nr_chips = ARRAY_SIZE(s5pv310_gpio_part1_4bit); - - for (i = 0; i < nr_chips; i++, chip++) { - if (chip->config == NULL) - chip->config = &gpio_cfg; - if (chip->base == NULL) - chip->base = S5P_VA_GPIO1 + (i) * 0x20; - } - - samsung_gpiolib_add_4bit_chips(s5pv310_gpio_part1_4bit, nr_chips); - - /* GPIO part 2 */ - - chip = s5pv310_gpio_part2_4bit; - nr_chips = ARRAY_SIZE(s5pv310_gpio_part2_4bit); - - for (i = 0; i < nr_chips; i++, chip++) { - if (chip->config == NULL) - chip->config = &gpio_cfg; - if (chip->base == NULL) - chip->base = S5P_VA_GPIO2 + (i) * 0x20; - } - - samsung_gpiolib_add_4bit_chips(s5pv310_gpio_part2_4bit, nr_chips); - - /* GPIO part 3 */ - - chip = s5pv310_gpio_part3_4bit; - nr_chips = ARRAY_SIZE(s5pv310_gpio_part3_4bit); - - for (i = 0; i < nr_chips; i++, chip++) { - if (chip->config == NULL) - chip->config = &gpio_cfg; - if (chip->base == NULL) - chip->base = S5P_VA_GPIO3 + (i) * 0x20; - } - - samsung_gpiolib_add_4bit_chips(s5pv310_gpio_part3_4bit, nr_chips); - - return 0; -} -core_initcall(s5pv310_gpiolib_init); diff --git a/arch/arm/mach-s5pv310/headsmp.S b/arch/arm/mach-s5pv310/headsmp.S deleted file mode 100644 index 164b7b045713..000000000000 --- a/arch/arm/mach-s5pv310/headsmp.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * linux/arch/arm/mach-s5pv310/headsmp.S - * - * Cloned from linux/arch/arm/mach-realview/headsmp.S - * - * Copyright (c) 2003 ARM Limited - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/linkage.h> -#include <linux/init.h> - - __INIT - -/* - * s5pv310 specific entry point for secondary CPUs. This provides - * a "holding pen" into which all secondary cores are held until we're - * ready for them to initialise. - */ -ENTRY(s5pv310_secondary_startup) - mrc p15, 0, r0, c0, c0, 5 - and r0, r0, #15 - adr r4, 1f - ldmia r4, {r5, r6} - sub r4, r4, r5 - add r6, r6, r4 -pen: ldr r7, [r6] - cmp r7, r0 - bne pen - - /* - * we've been released from the holding pen: secondary_stack - * should now contain the SVC stack for this core - */ - b secondary_startup - -1: .long . - .long pen_release diff --git a/arch/arm/mach-s5pv310/hotplug.c b/arch/arm/mach-s5pv310/hotplug.c deleted file mode 100644 index c24235c89eed..000000000000 --- a/arch/arm/mach-s5pv310/hotplug.c +++ /dev/null @@ -1,130 +0,0 @@ -/* linux arch/arm/mach-s5pv310/hotplug.c - * - * Cloned from linux/arch/arm/mach-realview/hotplug.c - * - * Copyright (C) 2002 ARM Ltd. - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/smp.h> - -#include <asm/cacheflush.h> - -extern volatile int pen_release; - -static inline void cpu_enter_lowpower(void) -{ - unsigned int v; - - flush_cache_all(); - asm volatile( - " mcr p15, 0, %1, c7, c5, 0\n" - " mcr p15, 0, %1, c7, c10, 4\n" - /* - * Turn off coherency - */ - " mrc p15, 0, %0, c1, c0, 1\n" - " bic %0, %0, #0x20\n" - " mcr p15, 0, %0, c1, c0, 1\n" - " mrc p15, 0, %0, c1, c0, 0\n" - " bic %0, %0, %2\n" - " mcr p15, 0, %0, c1, c0, 0\n" - : "=&r" (v) - : "r" (0), "Ir" (CR_C) - : "cc"); -} - -static inline void cpu_leave_lowpower(void) -{ - unsigned int v; - - asm volatile( - "mrc p15, 0, %0, c1, c0, 0\n" - " orr %0, %0, %1\n" - " mcr p15, 0, %0, c1, c0, 0\n" - " mrc p15, 0, %0, c1, c0, 1\n" - " orr %0, %0, #0x20\n" - " mcr p15, 0, %0, c1, c0, 1\n" - : "=&r" (v) - : "Ir" (CR_C) - : "cc"); -} - -static inline void platform_do_lowpower(unsigned int cpu, int *spurious) -{ - /* - * there is no power-control hardware on this platform, so all - * we can do is put the core into WFI; this is safe as the calling - * code will have already disabled interrupts - */ - for (;;) { - /* - * here's the WFI - */ - asm(".word 0xe320f003\n" - : - : - : "memory", "cc"); - - if (pen_release == cpu) { - /* - * OK, proper wakeup, we're done - */ - break; - } - - /* - * Getting here, means that we have come out of WFI without - * having been woken up - this shouldn't happen - * - * Just note it happening - when we're woken, we can report - * its occurrence. - */ - (*spurious)++; - } -} - -int platform_cpu_kill(unsigned int cpu) -{ - return 1; -} - -/* - * platform-specific code to shutdown a CPU - * - * Called with IRQs disabled - */ -void platform_cpu_die(unsigned int cpu) -{ - int spurious = 0; - - /* - * we're ready for shutdown now, so do it - */ - cpu_enter_lowpower(); - platform_do_lowpower(cpu, &spurious); - - /* - * bring this CPU back into the world of cache - * coherency, and then restore interrupts - */ - cpu_leave_lowpower(); - - if (spurious) - pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious); -} - -int platform_cpu_disable(unsigned int cpu) -{ - /* - * we don't allow CPU 0 to be shutdown (it is still too special - * e.g. clock tick interrupts) - */ - return cpu == 0 ? -EPERM : 0; -} diff --git a/arch/arm/mach-s5pv310/include/mach/debug-macro.S b/arch/arm/mach-s5pv310/include/mach/debug-macro.S deleted file mode 100644 index b0d920c474d3..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/debug-macro.S +++ /dev/null @@ -1,35 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/debug-macro.S - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* pull in the relevant register and map files. */ - -#include <mach/map.h> - - /* note, for the boot process to work we have to keep the UART - * virtual address aligned to an 1MiB boundary for the L1 - * mapping the head code makes. We keep the UART virtual address - * aligned and add in the offset when we load the value here. - */ - - .macro addruart, rp, rv - ldreq \rp, = S3C_PA_UART - ldrne \rv, = S3C_VA_UART -#if CONFIG_DEBUG_S3C_UART != 0 - add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART) - add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART) -#endif - .endm - -#define fifo_full fifo_full_s5pv210 -#define fifo_level fifo_level_s5pv210 - -#include <plat/debug-macro.S> diff --git a/arch/arm/mach-s5pv310/include/mach/dma.h b/arch/arm/mach-s5pv310/include/mach/dma.h deleted file mode 100644 index 81209eb1409b..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/dma.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __MACH_DMA_H -#define __MACH_DMA_H - -/* This platform uses the common S3C DMA API driver for PL330 */ -#include <plat/s3c-dma-pl330.h> - -#endif /* __MACH_DMA_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/entry-macro.S b/arch/arm/mach-s5pv310/include/mach/entry-macro.S deleted file mode 100644 index e600e1d522df..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/entry-macro.S +++ /dev/null @@ -1,84 +0,0 @@ -/* arch/arm/mach-s5pv310/include/mach/entry-macro.S - * - * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for S5PV310 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. -*/ - -#include <mach/hardware.h> -#include <asm/hardware/gic.h> - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - /* - * The interrupt numbering scheme is defined in the - * interrupt controller spec. To wit: - * - * Interrupts 0-15 are IPI - * 16-28 are reserved - * 29-31 are local. We allow 30 to be used for the watchdog. - * 32-1020 are global - * 1021-1022 are reserved - * 1023 is "spurious" (no interrupt) - * - * For now, we ignore all local interrupts so only return an interrupt if it's - * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. - * - * A simple read from the controller will tell us the number of the highest - * priority enabled interrupt. We then just need to check whether it is in the - * valid range for an IRQ (30-1020 inclusive). - */ - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ - - ldr \tmp, =1021 - - bic \irqnr, \irqstat, #0x1c00 - - cmp \irqnr, #29 - cmpcc \irqnr, \irqnr - cmpne \irqnr, \tmp - cmpcs \irqnr, \irqnr - addne \irqnr, \irqnr, #32 - - .endm - - /* We assume that irqstat (the raw value of the IRQ acknowledge - * register) is preserved from the macro above. - * If there is an IPI, we immediately signal end of interrupt on the - * controller, since this requires the original irqstat value which - * we won't easily be able to recreate later. - */ - - .macro test_for_ipi, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #16 - strcc \irqstat, [\base, #GIC_CPU_EOI] - cmpcs \irqnr, \irqnr - .endm - - /* As above, this assumes that irqstat and base are preserved.. */ - - .macro test_for_ltirq, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - mov \tmp, #0 - cmp \irqnr, #29 - moveq \tmp, #1 - streq \irqstat, [\base, #GIC_CPU_EOI] - cmp \tmp, #0 - .endm diff --git a/arch/arm/mach-s5pv310/include/mach/gpio.h b/arch/arm/mach-s5pv310/include/mach/gpio.h deleted file mode 100644 index 20cb80c23466..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/gpio.h +++ /dev/null @@ -1,135 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/gpio.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV310 - GPIO lib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H __FILE__ - -#define gpio_get_value __gpio_get_value -#define gpio_set_value __gpio_set_value -#define gpio_cansleep __gpio_cansleep -#define gpio_to_irq __gpio_to_irq - -/* Practically, GPIO banks upto GPZ are the configurable gpio banks */ - -/* GPIO bank sizes */ -#define S5PV310_GPIO_A0_NR (8) -#define S5PV310_GPIO_A1_NR (6) -#define S5PV310_GPIO_B_NR (8) -#define S5PV310_GPIO_C0_NR (5) -#define S5PV310_GPIO_C1_NR (5) -#define S5PV310_GPIO_D0_NR (4) -#define S5PV310_GPIO_D1_NR (4) -#define S5PV310_GPIO_E0_NR (5) -#define S5PV310_GPIO_E1_NR (8) -#define S5PV310_GPIO_E2_NR (6) -#define S5PV310_GPIO_E3_NR (8) -#define S5PV310_GPIO_E4_NR (8) -#define S5PV310_GPIO_F0_NR (8) -#define S5PV310_GPIO_F1_NR (8) -#define S5PV310_GPIO_F2_NR (8) -#define S5PV310_GPIO_F3_NR (6) -#define S5PV310_GPIO_J0_NR (8) -#define S5PV310_GPIO_J1_NR (5) -#define S5PV310_GPIO_K0_NR (7) -#define S5PV310_GPIO_K1_NR (7) -#define S5PV310_GPIO_K2_NR (7) -#define S5PV310_GPIO_K3_NR (7) -#define S5PV310_GPIO_L0_NR (8) -#define S5PV310_GPIO_L1_NR (3) -#define S5PV310_GPIO_L2_NR (8) -#define S5PV310_GPIO_X0_NR (8) -#define S5PV310_GPIO_X1_NR (8) -#define S5PV310_GPIO_X2_NR (8) -#define S5PV310_GPIO_X3_NR (8) -#define S5PV310_GPIO_Z_NR (7) - -/* GPIO bank numbers */ - -#define S5PV310_GPIO_NEXT(__gpio) \ - ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) - -enum s5p_gpio_number { - S5PV310_GPIO_A0_START = 0, - S5PV310_GPIO_A1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_A0), - S5PV310_GPIO_B_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_A1), - S5PV310_GPIO_C0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_B), - S5PV310_GPIO_C1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_C0), - S5PV310_GPIO_D0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_C1), - S5PV310_GPIO_D1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_D0), - S5PV310_GPIO_E0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_D1), - S5PV310_GPIO_E1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E0), - S5PV310_GPIO_E2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E1), - S5PV310_GPIO_E3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E2), - S5PV310_GPIO_E4_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E3), - S5PV310_GPIO_F0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E4), - S5PV310_GPIO_F1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F0), - S5PV310_GPIO_F2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F1), - S5PV310_GPIO_F3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F2), - S5PV310_GPIO_J0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F3), - S5PV310_GPIO_J1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_J0), - S5PV310_GPIO_K0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_J1), - S5PV310_GPIO_K1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K0), - S5PV310_GPIO_K2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K1), - S5PV310_GPIO_K3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K2), - S5PV310_GPIO_L0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K3), - S5PV310_GPIO_L1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_L0), - S5PV310_GPIO_L2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_L1), - S5PV310_GPIO_X0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_L2), - S5PV310_GPIO_X1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X0), - S5PV310_GPIO_X2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X1), - S5PV310_GPIO_X3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X2), - S5PV310_GPIO_Z_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X3), -}; - -/* S5PV310 GPIO number definitions */ -#define S5PV310_GPA0(_nr) (S5PV310_GPIO_A0_START + (_nr)) -#define S5PV310_GPA1(_nr) (S5PV310_GPIO_A1_START + (_nr)) -#define S5PV310_GPB(_nr) (S5PV310_GPIO_B_START + (_nr)) -#define S5PV310_GPC0(_nr) (S5PV310_GPIO_C0_START + (_nr)) -#define S5PV310_GPC1(_nr) (S5PV310_GPIO_C1_START + (_nr)) -#define S5PV310_GPD0(_nr) (S5PV310_GPIO_D0_START + (_nr)) -#define S5PV310_GPD1(_nr) (S5PV310_GPIO_D1_START + (_nr)) -#define S5PV310_GPE0(_nr) (S5PV310_GPIO_E0_START + (_nr)) -#define S5PV310_GPE1(_nr) (S5PV310_GPIO_E1_START + (_nr)) -#define S5PV310_GPE2(_nr) (S5PV310_GPIO_E2_START + (_nr)) -#define S5PV310_GPE3(_nr) (S5PV310_GPIO_E3_START + (_nr)) -#define S5PV310_GPE4(_nr) (S5PV310_GPIO_E4_START + (_nr)) -#define S5PV310_GPF0(_nr) (S5PV310_GPIO_F0_START + (_nr)) -#define S5PV310_GPF1(_nr) (S5PV310_GPIO_F1_START + (_nr)) -#define S5PV310_GPF2(_nr) (S5PV310_GPIO_F2_START + (_nr)) -#define S5PV310_GPF3(_nr) (S5PV310_GPIO_F3_START + (_nr)) -#define S5PV310_GPJ0(_nr) (S5PV310_GPIO_J0_START + (_nr)) -#define S5PV310_GPJ1(_nr) (S5PV310_GPIO_J1_START + (_nr)) -#define S5PV310_GPK0(_nr) (S5PV310_GPIO_K0_START + (_nr)) -#define S5PV310_GPK1(_nr) (S5PV310_GPIO_K1_START + (_nr)) -#define S5PV310_GPK2(_nr) (S5PV310_GPIO_K2_START + (_nr)) -#define S5PV310_GPK3(_nr) (S5PV310_GPIO_K3_START + (_nr)) -#define S5PV310_GPL0(_nr) (S5PV310_GPIO_L0_START + (_nr)) -#define S5PV310_GPL1(_nr) (S5PV310_GPIO_L1_START + (_nr)) -#define S5PV310_GPL2(_nr) (S5PV310_GPIO_L2_START + (_nr)) -#define S5PV310_GPX0(_nr) (S5PV310_GPIO_X0_START + (_nr)) -#define S5PV310_GPX1(_nr) (S5PV310_GPIO_X1_START + (_nr)) -#define S5PV310_GPX2(_nr) (S5PV310_GPIO_X2_START + (_nr)) -#define S5PV310_GPX3(_nr) (S5PV310_GPIO_X3_START + (_nr)) -#define S5PV310_GPZ(_nr) (S5PV310_GPIO_Z_START + (_nr)) - -/* the end of the S5PV310 specific gpios */ -#define S5PV310_GPIO_END (S5PV310_GPZ(S5PV310_GPIO_Z_NR) + 1) -#define S3C_GPIO_END S5PV310_GPIO_END - -/* define the number of gpios we need to the one after the GPZ() range */ -#define ARCH_NR_GPIOS (S5PV310_GPZ(S5PV310_GPIO_Z_NR) + \ - CONFIG_SAMSUNG_GPIO_EXTRA + 1) - -#include <asm-generic/gpio.h> - -#endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/hardware.h b/arch/arm/mach-s5pv310/include/mach/hardware.h deleted file mode 100644 index 28ff9881f1a6..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/hardware.h +++ /dev/null @@ -1,18 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/hardware.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV310 - Hardware support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H __FILE__ - -/* currently nothing here, placeholder */ - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/io.h b/arch/arm/mach-s5pv310/include/mach/io.h deleted file mode 100644 index 8a7f9128391f..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/io.h +++ /dev/null @@ -1,26 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/io.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org> - * - * Based on arch/arm/mach-s5p6442/include/mach/io.h - * - * Default IO routines for S5PV310 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H __FILE__ - -/* No current ISA/PCI bus support. */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#define IO_SPACE_LIMIT (0xFFFFFFFF) - -#endif /* __ASM_ARM_ARCH_IO_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h deleted file mode 100644 index 901657fa7a12..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/map.h +++ /dev/null @@ -1,144 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/map.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV310 - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MAP_H -#define __ASM_ARCH_MAP_H __FILE__ - -#include <plat/map-base.h> - -/* - * S5PV310 UART offset is 0x10000 but the older S5P SoCs are 0x400. - * So need to define it, and here is to avoid redefinition warning. - */ -#define S3C_UART_OFFSET (0x10000) - -#include <plat/map-s5p.h> - -#define S5PV310_PA_SYSRAM 0x02025000 - -#define S5PV310_PA_I2S0 0x03830000 -#define S5PV310_PA_I2S1 0xE3100000 -#define S5PV310_PA_I2S2 0xE2A00000 - -#define S5PV310_PA_PCM0 0x03840000 -#define S5PV310_PA_PCM1 0x13980000 -#define S5PV310_PA_PCM2 0x13990000 - -#define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000)) - -#define S5PC210_PA_ONENAND 0x0C000000 -#define S5PC210_PA_ONENAND_DMA 0x0C600000 - -#define S5PV310_PA_CHIPID 0x10000000 - -#define S5PV310_PA_SYSCON 0x10010000 -#define S5PV310_PA_PMU 0x10020000 -#define S5PV310_PA_CMU 0x10030000 - -#define S5PV310_PA_WATCHDOG 0x10060000 -#define S5PV310_PA_RTC 0x10070000 - -#define S5PV310_PA_DMC0 0x10400000 - -#define S5PV310_PA_COMBINER 0x10448000 - -#define S5PV310_PA_COREPERI 0x10500000 -#define S5PV310_PA_GIC_CPU 0x10500100 -#define S5PV310_PA_TWD 0x10500600 -#define S5PV310_PA_GIC_DIST 0x10501000 -#define S5PV310_PA_L2CC 0x10502000 - -#define S5PV310_PA_MDMA 0x10810000 -#define S5PV310_PA_PDMA0 0x12680000 -#define S5PV310_PA_PDMA1 0x12690000 - -#define S5PV310_PA_SYSMMU_MDMA 0x10A40000 -#define S5PV310_PA_SYSMMU_SSS 0x10A50000 -#define S5PV310_PA_SYSMMU_FIMC0 0x11A20000 -#define S5PV310_PA_SYSMMU_FIMC1 0x11A30000 -#define S5PV310_PA_SYSMMU_FIMC2 0x11A40000 -#define S5PV310_PA_SYSMMU_FIMC3 0x11A50000 -#define S5PV310_PA_SYSMMU_JPEG 0x11A60000 -#define S5PV310_PA_SYSMMU_FIMD0 0x11E20000 -#define S5PV310_PA_SYSMMU_FIMD1 0x12220000 -#define S5PV310_PA_SYSMMU_PCIe 0x12620000 -#define S5PV310_PA_SYSMMU_G2D 0x12A20000 -#define S5PV310_PA_SYSMMU_ROTATOR 0x12A30000 -#define S5PV310_PA_SYSMMU_MDMA2 0x12A40000 -#define S5PV310_PA_SYSMMU_TV 0x12E20000 -#define S5PV310_PA_SYSMMU_MFC_L 0x13620000 -#define S5PV310_PA_SYSMMU_MFC_R 0x13630000 - -#define S5PV310_PA_GPIO1 0x11400000 -#define S5PV310_PA_GPIO2 0x11000000 -#define S5PV310_PA_GPIO3 0x03860000 - -#define S5PV310_PA_MIPI_CSIS0 0x11880000 -#define S5PV310_PA_MIPI_CSIS1 0x11890000 - -#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) - -#define S5PV310_PA_SROMC 0x12570000 - -#define S5PV310_PA_UART 0x13800000 - -#define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) - -#define S5PV310_PA_AC97 0x139A0000 - -#define S5PV310_PA_TIMER 0x139D0000 - -#define S5PV310_PA_SDRAM 0x40000000 - -#define S5PV310_PA_SPDIF 0xE1100000 - -/* Compatibiltiy Defines */ - -#define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0) -#define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1) -#define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) -#define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3) -#define S3C_PA_IIC S5PV310_PA_IIC(0) -#define S3C_PA_IIC1 S5PV310_PA_IIC(1) -#define S3C_PA_IIC2 S5PV310_PA_IIC(2) -#define S3C_PA_IIC3 S5PV310_PA_IIC(3) -#define S3C_PA_IIC4 S5PV310_PA_IIC(4) -#define S3C_PA_IIC5 S5PV310_PA_IIC(5) -#define S3C_PA_IIC6 S5PV310_PA_IIC(6) -#define S3C_PA_IIC7 S5PV310_PA_IIC(7) -#define S3C_PA_RTC S5PV310_PA_RTC -#define S3C_PA_WDT S5PV310_PA_WATCHDOG - -#define S5P_PA_CHIPID S5PV310_PA_CHIPID -#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0 -#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1 -#define S5P_PA_ONENAND S5PC210_PA_ONENAND -#define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA -#define S5P_PA_SDRAM S5PV310_PA_SDRAM -#define S5P_PA_SROMC S5PV310_PA_SROMC -#define S5P_PA_SYSCON S5PV310_PA_SYSCON -#define S5P_PA_TIMER S5PV310_PA_TIMER - -/* UART */ - -#define S3C_PA_UART S5PV310_PA_UART - -#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) -#define S5P_PA_UART0 S5P_PA_UART(0) -#define S5P_PA_UART1 S5P_PA_UART(1) -#define S5P_PA_UART2 S5P_PA_UART(2) -#define S5P_PA_UART3 S5P_PA_UART(3) -#define S5P_PA_UART4 S5P_PA_UART(4) - -#define S5P_SZ_UART SZ_256 - -#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/memory.h b/arch/arm/mach-s5pv310/include/mach/memory.h deleted file mode 100644 index 1dffb4823245..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/memory.h +++ /dev/null @@ -1,22 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/memory.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV310 - Memory definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H __FILE__ - -#define PHYS_OFFSET UL(0x40000000) - -/* Maximum of 256MiB in one bank */ -#define MAX_PHYSMEM_BITS 32 -#define SECTION_SIZE_BITS 28 - -#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-gpio.h b/arch/arm/mach-s5pv310/include/mach/regs-gpio.h deleted file mode 100644 index 82e9e0c9d452..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/regs-gpio.h +++ /dev/null @@ -1,42 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-gpio.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV310 - GPIO (including EINT) register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_GPIO_H -#define __ASM_ARCH_REGS_GPIO_H __FILE__ - -#include <mach/map.h> -#include <mach/irqs.h> - -#define S5PV310_EINT40CON (S5P_VA_GPIO2 + 0xE00) -#define S5P_EINT_CON(x) (S5PV310_EINT40CON + ((x) * 0x4)) - -#define S5PV310_EINT40FLTCON0 (S5P_VA_GPIO2 + 0xE80) -#define S5P_EINT_FLTCON(x) (S5PV310_EINT40FLTCON0 + ((x) * 0x4)) - -#define S5PV310_EINT40MASK (S5P_VA_GPIO2 + 0xF00) -#define S5P_EINT_MASK(x) (S5PV310_EINT40MASK + ((x) * 0x4)) - -#define S5PV310_EINT40PEND (S5P_VA_GPIO2 + 0xF40) -#define S5P_EINT_PEND(x) (S5PV310_EINT40PEND + ((x) * 0x4)) - -#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) - -#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) - -#define EINT_MODE S3C_GPIO_SFN(0xf) - -#define EINT_GPIO_0(x) S5PV310_GPX0(x) -#define EINT_GPIO_1(x) S5PV310_GPX1(x) -#define EINT_GPIO_2(x) S5PV310_GPX2(x) -#define EINT_GPIO_3(x) S5PV310_GPX3(x) - -#endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-mem.h b/arch/arm/mach-s5pv310/include/mach/regs-mem.h deleted file mode 100644 index 834227140eaa..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/regs-mem.h +++ /dev/null @@ -1,23 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-mem.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV310 - SROMC and DMC register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_MEM_H -#define __ASM_ARCH_REGS_MEM_H __FILE__ - -#include <mach/map.h> - -#define S5P_DMC0_MEMCON_OFFSET 0x04 - -#define S5P_DMC0_MEMTYPE_SHIFT 8 -#define S5P_DMC0_MEMTYPE_MASK 0xF - -#endif /* __ASM_ARCH_REGS_MEM_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h b/arch/arm/mach-s5pv310/include/mach/regs-pmu.h deleted file mode 100644 index fb333d0f6073..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h +++ /dev/null @@ -1,30 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-pmu.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV310 - Power management unit definition - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_PMU_H -#define __ASM_ARCH_REGS_PMU_H __FILE__ - -#include <mach/map.h> - -#define S5P_PMUREG(x) (S5P_VA_PMU + (x)) - -#define S5P_PMU_CAM_CONF S5P_PMUREG(0x3C00) -#define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20) -#define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40) -#define S5P_PMU_G3D_CONF S5P_PMUREG(0x3C60) -#define S5P_PMU_LCD0_CONF S5P_PMUREG(0x3C80) -#define S5P_PMU_LCD1_CONF S5P_PMUREG(0x3CA0) -#define S5P_PMU_GPS_CONF S5P_PMUREG(0x3CE0) - -#define S5P_INT_LOCAL_PWR_EN 0x7 - -#endif /* __ASM_ARCH_REGS_PMU_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h b/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h deleted file mode 100644 index 0b28e81a16f7..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h +++ /dev/null @@ -1,24 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV310 - System MMU register - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_SYSMMU_H -#define __ASM_ARCH_REGS_SYSMMU_H __FILE__ - -#define S5P_MMU_CTRL 0x000 -#define S5P_MMU_CFG 0x004 -#define S5P_MMU_STATUS 0x008 -#define S5P_MMU_FLUSH 0x00C -#define S5P_PT_BASE_ADDR 0x014 -#define S5P_INT_STATUS 0x018 -#define S5P_PAGE_FAULT_ADDR 0x024 - -#endif /* __ASM_ARCH_REGS_SYSMMU_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/smp.h b/arch/arm/mach-s5pv310/include/mach/smp.h deleted file mode 100644 index 393ccbd52c4a..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/smp.h +++ /dev/null @@ -1,19 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/smp.h - * - * Cloned from arch/arm/mach-realview/include/mach/smp.h -*/ - -#ifndef ASM_ARCH_SMP_H -#define ASM_ARCH_SMP_H __FILE__ - -#include <asm/hardware/gic.h> - -/* - * We use IRQ1 as the IPI - */ -static inline void smp_cross_call(const struct cpumask *mask, int ipi) -{ - gic_raise_softirq(mask, ipi); -} - -#endif diff --git a/arch/arm/mach-s5pv310/include/mach/sysmmu.h b/arch/arm/mach-s5pv310/include/mach/sysmmu.h deleted file mode 100644 index 598fc5c9211b..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/sysmmu.h +++ /dev/null @@ -1,122 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/sysmmu.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Samsung sysmmu driver for S5PV310 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARM_ARCH_SYSMMU_H -#define __ASM_ARM_ARCH_SYSMMU_H __FILE__ - -#define S5PV310_SYSMMU_TOTAL_IPNUM 16 -#define S5P_SYSMMU_TOTAL_IPNUM S5PV310_SYSMMU_TOTAL_IPNUM - -enum s5pv310_sysmmu_ips { - SYSMMU_MDMA, - SYSMMU_SSS, - SYSMMU_FIMC0, - SYSMMU_FIMC1, - SYSMMU_FIMC2, - SYSMMU_FIMC3, - SYSMMU_JPEG, - SYSMMU_FIMD0, - SYSMMU_FIMD1, - SYSMMU_PCIe, - SYSMMU_G2D, - SYSMMU_ROTATOR, - SYSMMU_MDMA2, - SYSMMU_TV, - SYSMMU_MFC_L, - SYSMMU_MFC_R, -}; - -static char *sysmmu_ips_name[S5PV310_SYSMMU_TOTAL_IPNUM] = { - "SYSMMU_MDMA" , - "SYSMMU_SSS" , - "SYSMMU_FIMC0" , - "SYSMMU_FIMC1" , - "SYSMMU_FIMC2" , - "SYSMMU_FIMC3" , - "SYSMMU_JPEG" , - "SYSMMU_FIMD0" , - "SYSMMU_FIMD1" , - "SYSMMU_PCIe" , - "SYSMMU_G2D" , - "SYSMMU_ROTATOR", - "SYSMMU_MDMA2" , - "SYSMMU_TV" , - "SYSMMU_MFC_L" , - "SYSMMU_MFC_R" , -}; - -typedef enum s5pv310_sysmmu_ips sysmmu_ips; - -struct sysmmu_tt_info { - unsigned long *pgd; - unsigned long pgd_paddr; - unsigned long *pte; -}; - -struct sysmmu_controller { - const char *name; - - /* channels registers */ - void __iomem *regs; - - /* channel irq */ - unsigned int irq; - - sysmmu_ips ips; - - /* Translation Table Info. */ - struct sysmmu_tt_info *tt_info; - - struct resource *mem; - struct device *dev; - - /* SysMMU controller enable - true : enable */ - bool enable; -}; - -/** - * s5p_sysmmu_enable() - enable system mmu of ip - * @ips: The ip connected system mmu. - * - * This function enable system mmu to transfer address - * from virtual address to physical address - */ -int s5p_sysmmu_enable(sysmmu_ips ips); - -/** - * s5p_sysmmu_disable() - disable sysmmu mmu of ip - * @ips: The ip connected system mmu. - * - * This function disable system mmu to transfer address - * from virtual address to physical address - */ -int s5p_sysmmu_disable(sysmmu_ips ips); - -/** - * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer page table - * @ips: The ip connected system mmu. - * @pgd: The page table base address. - * - * This function set page table base address - * When system mmu transfer address from virtaul address to physical address, - * system mmu refer address information from page table - */ -int s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd); - -/** - * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu - * @ips: The ip connected system mmu. - * - * This function flush all TLB entry in system mmu - */ -int s5p_sysmmu_tlb_invalidate(sysmmu_ips ips); -#endif /* __ASM_ARM_ARCH_SYSMMU_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/system.h b/arch/arm/mach-s5pv310/include/mach/system.h deleted file mode 100644 index d10c009cf0f1..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/system.h +++ /dev/null @@ -1,22 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/system.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV310 - system support header - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H __FILE__ - -#include <plat/system-reset.h> - -static void arch_idle(void) -{ - /* nothing here yet */ -} -#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/timex.h b/arch/arm/mach-s5pv310/include/mach/timex.h deleted file mode 100644 index bd2359b952b4..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/timex.h +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/timex.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright (c) 2003-2010 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Based on arch/arm/mach-s5p6442/include/mach/timex.h - * - * S5PV310 - time parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H __FILE__ - -/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it - * a variable is useless. It seems as long as we make our timers an - * exact multiple of HZ, any value that makes a 1->1 correspondence - * for the time conversion functions to/from jiffies is acceptable. -*/ - -#define CLOCK_TICK_RATE 12000000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/uncompress.h b/arch/arm/mach-s5pv310/include/mach/uncompress.h deleted file mode 100644 index 59593c1e2416..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/uncompress.h +++ /dev/null @@ -1,30 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/uncompress.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV310 - uncompress code - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H __FILE__ - -#include <mach/map.h> -#include <plat/uncompress.h> - -static void arch_detect_cpu(void) -{ - /* we do not need to do any cpu detection here at the moment. */ - - /* - * For preventing FIFO overrun or infinite loop of UART console, - * fifo_max should be the minimum fifo size of all of the UART channels - */ - fifo_mask = S5PV210_UFSTAT_TXMASK; - fifo_max = 15 << S5PV210_UFSTAT_TXSHIFT; -} -#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/vmalloc.h b/arch/arm/mach-s5pv310/include/mach/vmalloc.h deleted file mode 100644 index 65759fb97581..000000000000 --- a/arch/arm/mach-s5pv310/include/mach/vmalloc.h +++ /dev/null @@ -1,22 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/vmalloc.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright 2010 Ben Dooks <ben-linux@fluff.org> - * - * Based on arch/arm/mach-s5p6440/include/mach/vmalloc.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S5PV310 vmalloc definition -*/ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H __FILE__ - -#define VMALLOC_END 0xF6000000UL - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5pv310/init.c b/arch/arm/mach-s5pv310/init.c deleted file mode 100644 index 182dcf42cfb4..000000000000 --- a/arch/arm/mach-s5pv310/init.c +++ /dev/null @@ -1,41 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/init.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/serial_core.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/regs-serial.h> - -static struct s3c24xx_uart_clksrc s5pv310_serial_clocks[] = { - [0] = { - .name = "uclk1", - .divisor = 1, - .min_baud = 0, - .max_baud = 0, - }, -}; - -/* uart registration process */ -void __init s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - struct s3c2410_uartcfg *tcfg = cfg; - u32 ucnt; - - for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { - if (!tcfg->clocks) { - tcfg->has_fracval = 1; - tcfg->clocks = s5pv310_serial_clocks; - tcfg->clocks_size = ARRAY_SIZE(s5pv310_serial_clocks); - } - } - - s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); -} diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-s5pv310/platsmp.c deleted file mode 100644 index 34093b069f67..000000000000 --- a/arch/arm/mach-s5pv310/platsmp.c +++ /dev/null @@ -1,172 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/platsmp.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Cloned from linux/arch/arm/mach-vexpress/platsmp.c - * - * Copyright (C) 2002 ARM Ltd. - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/errno.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/jiffies.h> -#include <linux/smp.h> -#include <linux/io.h> - -#include <asm/cacheflush.h> -#include <asm/smp_scu.h> -#include <asm/unified.h> - -#include <mach/hardware.h> -#include <mach/regs-clock.h> - -extern void s5pv310_secondary_startup(void); - -/* - * control for which core is the next to come out of the secondary - * boot "holding pen" - */ - -volatile int __cpuinitdata pen_release = -1; - -/* - * Write pen_release in a way that is guaranteed to be visible to all - * observers, irrespective of whether they're taking part in coherency - * or not. This is necessary for the hotplug code to work reliably. - */ -static void write_pen_release(int val) -{ - pen_release = val; - smp_wmb(); - __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release)); - outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1)); -} - -static void __iomem *scu_base_addr(void) -{ - return (void __iomem *)(S5P_VA_SCU); -} - -static DEFINE_SPINLOCK(boot_lock); - -void __cpuinit platform_secondary_init(unsigned int cpu) -{ - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* - * let the primary processor know we're out of the - * pen, then head off into the C entry point - */ - write_pen_release(-1); - - /* - * Synchronise with the boot thread. - */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); -} - -int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) -{ - unsigned long timeout; - - /* - * Set synchronisation state between this boot processor - * and the secondary one - */ - spin_lock(&boot_lock); - - /* - * The secondary processor is waiting to be released from - * the holding pen - release it, then wait for it to flag - * that it has been released by resetting pen_release. - * - * Note that "pen_release" is the hardware CPU ID, whereas - * "cpu" is Linux's internal ID. - */ - write_pen_release(cpu); - - /* - * Send the secondary CPU a soft interrupt, thereby causing - * the boot monitor to read the system wide flags register, - * and branch to the address found there. - */ - smp_cross_call(cpumask_of(cpu), 1); - - timeout = jiffies + (1 * HZ); - while (time_before(jiffies, timeout)) { - smp_rmb(); - if (pen_release == -1) - break; - - udelay(10); - } - - /* - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ - spin_unlock(&boot_lock); - - return pen_release != -1 ? -ENOSYS : 0; -} - -/* - * Initialise the CPU possible map early - this describes the CPUs - * which may be present or become present in the system. - */ - -void __init smp_init_cpus(void) -{ - void __iomem *scu_base = scu_base_addr(); - unsigned int i, ncores; - - ncores = scu_base ? scu_get_core_count(scu_base) : 1; - - /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "S5PV310: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; - } - - for (i = 0; i < ncores; i++) - set_cpu_possible(i, true); -} - -void __init platform_smp_prepare_cpus(unsigned int max_cpus) -{ - int i; - - /* - * Initialise the present map, which describes the set of CPUs - * actually populated at the present time. - */ - for (i = 0; i < max_cpus; i++) - set_cpu_present(i, true); - - scu_enable(scu_base_addr()); - - /* - * Write the address of secondary startup into the - * system-wide flags register. The boot monitor waits - * until it receives a soft interrupt, and then the - * secondary CPU branches to this address. - */ - __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_VA_SYSRAM); -} diff --git a/arch/arm/mach-s5pv310/setup-i2c0.c b/arch/arm/mach-s5pv310/setup-i2c0.c deleted file mode 100644 index f47f8f3152ec..000000000000 --- a/arch/arm/mach-s5pv310/setup-i2c0.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/arch/arm/mach-s5pv310/setup-i2c0.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * I2C0 GPIO configuration. - * - * Based on plat-s3c64xx/setup-i2c0.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <plat/iic.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c0_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5PV310_GPD1(0), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} |