summaryrefslogtreecommitdiff
path: root/arch/arm/mach-sa1100/include/mach
diff options
context:
space:
mode:
authorBorislav Petkov <bp@suse.de>2014-01-15 00:07:11 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-02-06 11:22:22 -0800
commitc5e16510e3454393fa8e40591bff28c190be2faa (patch)
tree81fa70a32ee55e0060045b53acd10385bce88f8a /arch/arm/mach-sa1100/include/mach
parent50692bdd5cde9f86d1f96f50627d2fbf266ee783 (diff)
x86, cpu, amd: Add workaround for family 16h, erratum 793
commit 3b56496865f9f7d9bcb2f93b44c63f274f08e3b6 upstream. This adds the workaround for erratum 793 as a precaution in case not every BIOS implements it. This addresses CVE-2013-6885. Erratum text: [Revision Guide for AMD Family 16h Models 00h-0Fh Processors, document 51810 Rev. 3.04 November 2013] 793 Specific Combination of Writes to Write Combined Memory Types and Locked Instructions May Cause Core Hang Description Under a highly specific and detailed set of internal timing conditions, a locked instruction may trigger a timing sequence whereby the write to a write combined memory type is not flushed, causing the locked instruction to stall indefinitely. Potential Effect on System Processor core hang. Suggested Workaround BIOS should set MSR C001_1020[15] = 1b. Fix Planned No fix planned [ hpa: updated description, fixed typo in MSR name ] Signed-off-by: Borislav Petkov <bp@suse.de> Link: http://lkml.kernel.org/r/20140114230711.GS29865@pd.tnic Tested-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/mach-sa1100/include/mach')
0 files changed, 0 insertions, 0 deletions