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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 20:34:22 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 20:34:22 -0700
commit6585dea1f99cc2265582ff2e4cc1727062136e92 (patch)
tree57378ccfe0f9fde73081e1f9355d05dd4131e178 /arch/arm/mach-shmobile
parent16ee792e45cf0c97ce061fce03c36cab5551ec72 (diff)
parent97c24c1aa403e0d4ef7c1958db8459e488862b46 (diff)
Merge branch 'next/cross-platform' of git://git.linaro.org/people/arnd/arm-soc
* 'next/cross-platform' of git://git.linaro.org/people/arnd/arm-soc: arm/imx: use Kconfig choice for low-level debug UART selection ARM: realview: use Kconfig choice for debug UART selection ARM: plat-samsung: use Kconfig choice for debug UART selection ARM: versatile: convert logical CPU numbers to physical numbers ARM: ux500: convert logical CPU numbers to physical numbers ARM: shmobile: convert logical CPU numbers to physical numbers ARM: msm: convert logical CPU numbers to physical numbers ARM: exynos4: convert logical CPU numbers to physical numbers Fix up trivial conflict (config DEBUG_S3C_UART move/split vs addition of ARM_KPROBES_TEST option) in arch/arm/Kconfig.debug
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 3ffdbc92ba82..be1ade76ccc8 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -74,6 +74,8 @@ void __cpuinit sh73a0_secondary_init(unsigned int cpu)
int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
{
+ cpu = cpu_logical_map(cpu);
+
/* enable cache coherency */
modify_scu_cpu_psr(0, 3 << (cpu * 8));
@@ -87,6 +89,8 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
void __init sh73a0_smp_prepare_cpus(void)
{
+ int cpu = cpu_logical_map(0);
+
scu_enable(scu_base_addr());
/* Map the reset vector (in headsmp.S) */
@@ -94,5 +98,5 @@ void __init sh73a0_smp_prepare_cpus(void)
__raw_writel(__pa(shmobile_secondary_vector), __io(SBAR));
/* enable cache coherency on CPU0 */
- modify_scu_cpu_psr(0, 3 << (0 * 8));
+ modify_scu_cpu_psr(0, 3 << (cpu * 8));
}